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Initial version of CCTL, 1KB serial bootloader for CC1110/CC1111

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Joby Taffey committed 2012-03-07 17:08:43 +00:00
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Makefile
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PROG = /cygdrive/c/Program\ Files/Texas\ Instruments/SmartRF\ Tools/Flash\ Programmer/bin/SmartRFProgConsole.exe
TARGET = cctl.hex
CC = sdcc
AS = sdas8051
CFLAGS = --model-small --opt-code-size
LDFLAGS_FLASH = \
--out-fmt-ihx \
--code-loc 0x0000 --code-size 0x400 \
--xram-loc 0xf000 --xram-size 0x1000 \
--iram-size 0x100
ASFLAGS = -plosgff
ifdef DEBUG
CFLAGS += --debug
endif
SRC = boot/main.c
ASM_SRC = boot/start.asm
ADB = $(SRC:.c=.c.adb)
ASM = $(SRC:.c=.c.asm)
LNK = $(SRC:.c=.c.lnk)
LST = $(SRC:.c=.c.lst)
REL = $(SRC:.c=.c.rel)
RST = $(SRC:.c=.c.rst)
SYM = $(SRC:.c=.c.sym)
ASM_ADB = $(ASM_SRC:.asm=.adb)
ASM_LNK = $(ASM_SRC:.asm=.lnk)
ASM_LST = $(ASM_SRC:.asm=.lst)
ASM_REL = $(ASM_SRC:.asm=.rel)
ASM_RST = $(ASM_SRC:.asm=.rst)
ASM_SYM = $(ASM_SRC:.asm=.sym)
PROGS = $(TARGET)
PCDB = $(PROGS:.hex=.cdb)
PLNK = $(PROGS:.hex=.lnk)
PMAP = $(PROGS:.hex=.map)
PMEM = $(PROGS:.hex=.mem)
PAOM = $(PROGS:.hex=)
%.c.rel : %.c
$(CC) -c $(CFLAGS) -o$*.c.rel $<
%.rel : %.asm
$(AS) -c $(ASFLAGS) $<
all: $(PROGS)
$(TARGET): $(REL) $(ASM_REL) Makefile
$(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o $(TARGET) $(ASM_REL) $(REL)
@echo Binary size `makebin -p < $(TARGET) | wc -c`
clean:
rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM)
rm -f $(ASM_ADB) $(ASM_LNK) $(ASM_LST) $(ASM_REL) $(ASM_RST) $(ASM_SYM)
rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM)
install: $(TARGET)
$(PROG) S EPV F="$(TARGET)"
README.markdown
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CC Tiny Loader
==============
CCTL is a serial bootloader for the Chipcon CC1110/CC1111 using only one 1KB page of flash.
It allows update of the the microcontroller firmware over its serial port.
The bootloader consists of two components, a piece of firmware that is flashed
onto the device and a C utility for downloading code and manipulating the
flash memory.
Authors
-------
Joby Taffey (c) 2012 <jrt-cctl@hodgepig.org>
Portions originally from CC Bootloader, Fergus Noble (c) 2011
Usage
-----
The first step is to flash your device with the `cctl.hex` firmware file. A prebuilt version `prebuilt-cctl.hex` is provided.
Once the device is flashed with this firmware it will identify itself over the serial interface with the message "CCTL" on reset.
The microcontroller is configured for 115200, 8N1 transmitting on P0.3, receiving on P0.2.
Note that the CC111x is not 5v tolerant, so be sure to use a 3v serial adapter.
You can now use cctl-prog to download your payload code.
For usage instructions, run cctl-prog with no arguments:
`./cctl-prog`
Preparing your user code for usage with the bootloader is very simple. All you
need to do is set your linker to start the code section at 0x400. For an
example of this see the `Makefile` file in the `example_payload` subdirectory.
This is the relevant line:
`LDFLAGS_FLASH = ... --code-loc 0x400 ...`
Building
--------
This requires [sdcc](http://sdcc.sourceforge.net/) (Small Device C Compiler).
Then it should be as simple as issuing
`make`
from the root directory of the project.
The code has been tested with SDCC version 3.0.0
Serial protocol
---------------
CCTL uses a custom binary serial protocol, running at 115200bps, 8 bits, no party, 1 stop bit.
On reset, the bootloader prints "\r\nCCTL\r\n" followed by "B" up to 8 times with a delay between each.
If the bootloader receives any character before printing "B" 8 times, it will enter upgrade mode.
If no character is received, the bootloader will attempt to launch user code from 0x400.
The bootloader enables the watchdog with a 1s timeout before jumping to user code, so launching a broken app should cause a reset.
Once in upgrade mode, the bootloader expects to receive at least one character per second, else it will reset using the hardware watchdog.
In upgrade mode, the following commands are available:
### Jump to user code
Jumps to user code. On failure, the device will reset.
-> `j`
## Erase page
Erase a 1KB page of flash. On completion, `\0` is sent
-> `e`, `uint8_t page` (0-31)
<- `\0`
## Read page
Read a 1KB page from flash. Sends 1024 raw bytes. On completion, '\0' is sent
-> `r`, `uint8_t page` (0-31)
<- uint8_t data[1024], `\0`
## Load page
Loads 1KB page from serial into a RAM buffer. Receives 1024 raw bytes. On completion, '\0' is sent
-> `l`, `uint8_t data[1024`
<- `\0`
## Program page
Program a 1KB page of flash from RAM buffer. On completion, `\0` is sent
-> `p`, `uint8_t page` (0-31)
<- `\0`
Interrupts
----------
CCTL resides in the first flash page, 0x0000 to 0x0400. On reset, the CC1110 begins executing from address 0x0000 where it finds the CCTL reset vector.
CCTL provides a vector table which jumps to the relevant vector in application code at 0x400 + offset.
For interrupts which are used by both CCTL and application code, CCTL looks at the F1 user flag in the PSW register. When this flag is 0, the bootloader isr is called, when 1, the application isr is called.
Application code should not modify PSW.F1.
boot/cc1110-ext.h
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boot/main.c
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/*
* CCTL - ChipCon Tiny Loader
* A 1KB serial bootloader for the CC1110/CC1111
* Joby Taffey (c) 2012 <jrt-cctl@hodgepig.org>
*
* Derived from CC Bootloader
* Fergus Noble (c) 2011
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
*/
#include <stdint.h>
#include <cc1110.h>
#include "cc1110-ext.h"
// Flash write timer value:
// FWT = 21000 * FCLK / (16 * 10^9)
// For FCLK = 24MHz, FWT = 0x1F
// For FCLK = 26MHz, FWT = 0x11
#define FLASH_FWT 0x11
// Address of flash controller data register
#define FLASH_FWDATA_ADDR 0xDFAF
#define RXFIFO_ELEMENTS 2048
#define RXFIFO_SIZE (RXFIFO_ELEMENTS - 1)
static __xdata uint8_t rxfifo[RXFIFO_SIZE];
static uint8_t rxfifo_in;
static uint8_t rxfifo_out;
static __xdata struct cc_dma_channel dma0_config;
static const __code uint8_t * __at (0x0000) flashp;
__xdata uint8_t rambuf[1024];
uint8_t page;
static const char banner[] = {'\r', '\n', 'C', 'C', 'T', 'L', '\r', '\n'};
struct cc_dma_channel
{
uint8_t src_high;
uint8_t src_low;
uint8_t dst_high;
uint8_t dst_low;
uint8_t len_high;
uint8_t len_low;
uint8_t cfg0;
uint8_t cfg1;
};
#define DMA_CFG0_TRIGGER_FLASH 18
#define DMA_CFG1_SRCINC_1 (1 << 6)
#define DMA_CFG1_DESTINC_0 (0 << 4)
#define DMA_CFG1_PRIORITY_HIGH (2 << 0)
#define DMAARM_DMAARM0 (1 << 0)
#define DMA_LEN_HIGH_VLEN_MASK (7 << 5)
#define DMA_LEN_HIGH_VLEN_LEN (0 << 5)
#define DMA_LEN_HIGH_VLEN_PLUS_1 (1 << 5)
#define DMA_LEN_HIGH_VLEN (2 << 5)
#define DMA_LEN_HIGH_VLEN_PLUS_2 (3 << 5)
#define DMA_LEN_HIGH_VLEN_PLUS_3 (4 << 5)
#define DMA_LEN_HIGH_MASK (0x1f)
#define DMA_CFG0_WORDSIZE_8 (0 << 7)
#define DMA_CFG0_WORDSIZE_16 (1 << 7)
#define DMA_CFG0_TMODE_MASK (3 << 5)
#define DMA_CFG0_TMODE_SINGLE (0 << 5)
#define DMA_CFG0_TMODE_BLOCK (1 << 5)
#define DMA_CFG0_TMODE_REPEATED_SINGLE (2 << 5)
#define DMA_CFG0_TMODE_REPEATED_BLOCK (3 << 5)
void flash_erase_page(void)
{
while (FCTL & FCTL_BUSY);
FWT = FLASH_FWT;
FADDRH = page << 1;
FADDRL = 0x00;
// Erase the page that will be written to
FCTL |= FCTL_ERASE;
__asm nop __endasm;
// Wait for the erase operation to complete
while (FCTL & FCTL_BUSY) {}
}
void flash_write_trigger(void)
{
// Enable flash write. Generates a DMA trigger. Must be aligned on a 2-byte
// boundary and is therefore implemented in assembly.
// p.s. if this looks a little crazy its because it is, sdcc doesn't currently
// support explicitly specifying code alignment which would make this easier
__asm
.globl flash_write_trigger_instruction
.globl flash_write_trigger_done
; Put our trigger instruction in the HOME segment (shared with some startup code)
; where it wont move around too much
.area HOME (CODE)
; Comment or uncomment these lines to adjust if you change the start.asm code
nop ; Padding to get onto 16-bit boundary
flash_write_trigger_instruction:
orl _FCTL, #0x02 ; FCTL |= FCTL_ERASE
nop ; Required, see datasheet.
ljmp flash_write_trigger_done ; Jump back into our function
; Meanwhile, back in the main CSEG segment...
.area CSEG (CODE)
; Jump to the trigger instruction
ljmp flash_write_trigger_instruction
flash_write_trigger_done:
__endasm;
}
void flash_write(void)
{
// Setup DMA descriptor
dma0_config.src_high = (((uint16_t)(__xdata uint16_t *)rambuf) >> 8) & 0x00FF;
dma0_config.src_low = ((uint16_t)(__xdata uint16_t *)rambuf) & 0x00FF;
dma0_config.dst_high = (FLASH_FWDATA_ADDR >> 8) & 0x00FF;
dma0_config.dst_low = FLASH_FWDATA_ADDR & 0x00FF;
dma0_config.len_high = DMA_LEN_HIGH_VLEN_LEN;
dma0_config.len_high |= ((1024) >> 8) & DMA_LEN_HIGH_MASK;
dma0_config.len_low = (1024) & 0x00FF;
dma0_config.cfg0 = \
DMA_CFG0_WORDSIZE_8 | \
DMA_CFG0_TMODE_SINGLE | \
DMA_CFG0_TRIGGER_FLASH;
dma0_config.cfg1 = \
DMA_CFG1_SRCINC_1 | \
DMA_CFG1_DESTINC_0 | \
DMA_CFG1_PRIORITY_HIGH;
// Point DMA controller at our DMA descriptor
DMA0CFGH = ((uint16_t)&dma0_config >> 8) & 0x00FF;
DMA0CFGL = (uint16_t)&dma0_config & 0x00FF;
// Waiting for the flash controller to be ready
while (FCTL & FCTL_BUSY);
// Configure the flash controller
FWT = FLASH_FWT;
FADDRH = (page << 1) & 0x3F;
//FADDRL = 0;//(page << 9) & 0xFF; // reset value is 0x00
// Arm the DMA channel, so that a DMA trigger will initiate DMA writing
DMAARM |= DMAARM_DMAARM0;
// Enable flash write - triggers the DMA transfer
flash_write_trigger();
// Wait for DMA transfer to complete
while (!(DMAIRQ & DMAIRQ_DMAIF0));
// Wait until flash controller not busy
while (FCTL & (FCTL_BUSY | FCTL_SWBSY));
// By now, the transfer is completed, so the transfer count is reached.
// The DMA channel 0 interrupt flag is then set, so we clear it here.
DMAIRQ &= ~DMAIRQ_DMAIF0;
}
uint8_t cons_getch(void)
{
if (rxfifo_in == rxfifo_out)
return 0;
page = rxfifo[rxfifo_out];
if (rxfifo_out + 1 == RXFIFO_SIZE)
rxfifo_out = 0;
else
rxfifo_out++;
return 1;
}
void cons_putc(uint8_t ch)
{
U0DBUF = ch;
while(!(U0CSR & U0CSR_TX_BYTE)); // wait for byte to be transmitted
U0CSR &= ~U0CSR_TX_BYTE; // Clear transmit byte status
}
void uart0_isr(void) __interrupt URX0_VECTOR
{
URX0IF = 0;
// HACK we know the buffer is big enough, as client is waiting for our ACK
// if(rxfifo_in != (( rxfifo_out - 1 + RXFIFO_SIZE) % RXFIFO_SIZE)) // not full
{
rxfifo[rxfifo_in] = U0DBUF;
if (rxfifo_in + 1 == RXFIFO_SIZE)
rxfifo_in = 0;
else
rxfifo_in++;
}
}
void jump_to_user(void)
{
if (*((__xdata uint8_t*)0x400) != 0xFF)
{
// Disable all interrupts
EA = 0;
IEN0 = IEN1 = IEN2 = 0;
// bootloader not running
F1 = 0;
// Jump to user code
__asm
ljmp #0x400
__endasm;
}
}
void bootloader_main(void)
{
uint16_t i;
uint8_t n;
// Initialise clocks
SLEEP &= ~SLEEP_OSC_PD; // enable RC oscillator
while( !(SLEEP & SLEEP_XOSC_S) ); // let oscillator stabilise
CLKCON = CLKCON_OSC32 | CLKCON_OSC | TICKSPD_DIV_32 | CLKSPD_DIV_2; // select internal HS RC oscillator
while (!(CLKCON & CLKCON_OSC));
CLKCON = CLKCON_OSC32 | TICKSPD_DIV_32 | CLKSPD_DIV_1; // select external crystal
// while (CLKCON & CLKCON_OSC);
// SLEEP |= SLEEP_OSC_PD; // Disable RC oscillator now that we have an external crystal
rxfifo_in = rxfifo_out = 0;
PERCFG = (PERCFG & ~PERCFG_U0CFG) | PERCFG_U1CFG;
P0SEL |= (1<<3) | (1<<2);
U0CSR = 0x80 | 0x40; // UART, RX on
U0BAUD = 34; // 115200
U0GCR = 13; // 115k2 baud at 13MHz, useful for coming out of sleep. Assumes clkspd_div2 in clkcon for HSRC osc
URX0IF = 0; // No interrupts pending at start
URX0IE = 1; // Serial Rx irqs enabled in system interrupt register
F1 = 1;
EA = 1;
n = 0;
while(n < sizeof(banner))
cons_putc(banner[n++]);
n = 8;
i = 65535;
while(!cons_getch() && n > 0)
{
if (i-- == 0)
{
cons_putc('B');
n--;
}
}
if (n != 0)
goto upgrade_loop;
jump_to_user();
upgrade_loop:
WDCTL = (WDCTL & ~WDCTL_INT) | WDCTL_INT_SEC_1; // watchdog on LS RCOSC, ~1s
WDCTL = (WDCTL & ~WDCTL_MODE) | WDCTL_EN; // start
while(1)
{
if (cons_getch())
{
WDCTL = (WDCTL & ~0xF0) | (0xA0); // pat
WDCTL = (WDCTL & ~0xF0) | (0x50);
switch(page)
{
case 'e':
while(!cons_getch());
flash_erase_page();
goto ack;
break;
case 'p':
while(!cons_getch());
flash_write();
goto ack;
break;
case 'r':
while(!cons_getch());
for (i=page<<10;i<(page+1)<<10;i++)
cons_putc(flashp[i]);
goto ack;
break;
case 'l':
i = 0;
while(i<1024)
{
while(!cons_getch());
rambuf[i] = page;
i++;
}
goto ack;
break;
case 'j':
jump_to_user();
break;
ack:
cons_putc(0);
}
}
}
}
boot/start.asm
+101
View File
@@ -0,0 +1,101 @@
.globl __start__stack
;--------------------------------------------------------
; Stack segment in internal ram
;--------------------------------------------------------
.area SSEG (DATA)
__start__stack:
.ds 1
;--------------------------------------------------------
; interrupt vector
;--------------------------------------------------------
.area VECTOR (CODE)
.globl __interrupt_vect
__interrupt_vect:
ljmp __sdcc_gsinit_startup
ljmp #(0x400+0x03)
.ds 5
ljmp #(0x400+0x0B)
.ds 5
ljmp uart0_isr_forward;
.ds 5
ljmp #(0x400+0x1B)
.ds 5
ljmp #(0x400+0x23)
.ds 5
ljmp #(0x400+0x2B)
.ds 5
ljmp #(0x400+0x33)
.ds 5
ljmp #(0x400+0x3B)
.ds 5
ljmp #(0x400+0x43)
.ds 5
ljmp #(0x400+0x4B)
.ds 5
ljmp #(0x400+0x53)
.ds 5
ljmp #(0x400+0x5B)
.ds 5
ljmp #(0x400+0x63)
.ds 5
ljmp #(0x400+0x6B)
.ds 5
ljmp #(0x400+0x73)
.ds 5
ljmp #(0x400+0x7B)
.ds 5
ljmp #(0x400+0x83)
.ds 5
ljmp #(0x400+0x8B)
.ds 5
uart0_isr_forward:
push psw
jnb psw.1, 00001$
pop psw
ljmp _uart0_isr
00001$:
pop psw
ljmp #(0x400+0x13)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area GSINIT (CODE)
.globl __sdcc_gsinit_startup
.globl __sdcc_program_startup
.globl __start__stack
.globl __mcs51_genXINIT
.globl __mcs51_genXRAMCLEAR
.globl __mcs51_genRAMCLEAR
.area GSFINAL (CODE)
.globl __sdcc_program_startup
ljmp __sdcc_program_startup
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
__sdcc_program_startup:
lcall _bootloader_main
; return from main will lock up
sjmp .
cctl-prog/Makefile
+9
View File
@@ -0,0 +1,9 @@
CFLAGS=-Wall
TARGET=cctl-prog
all:
gcc -o $(TARGET) $(CFLAGS) $(TARGET).c hex.c
clean:
rm -f $(TARGET) $(TARGET).exe
cctl-prog/cctl-prog.c
+292
View File
@@ -0,0 +1,292 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <fcntl.h>
#include <unistd.h>
#include <termios.h>
#include <sys/select.h>
#include <sys/types.h>
#include <stdbool.h>
#include "hex.h"
int serial_open(char *port)
{
int fd;
struct termios t_opt;
fd = open(port, O_RDWR | O_NOCTTY);
if (fd == -1) {
fprintf(stderr, "Could not open serial port.");
return -1;
}
fcntl(fd, F_SETFL, 0);
tcgetattr(fd, &t_opt);
cfsetispeed(&t_opt, B115200);
cfsetospeed(&t_opt, B115200);
t_opt.c_cflag |= (CLOCAL | CREAD);
t_opt.c_cflag &= ~PARENB;
t_opt.c_cflag &= ~CSTOPB;
t_opt.c_cflag &= ~CSIZE;
t_opt.c_cflag |= CS8;
t_opt.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
t_opt.c_iflag &= ~(IXON | IXOFF | IXANY);
t_opt.c_oflag &= ~OPOST;
t_opt.c_cc[VMIN] = 0;
t_opt.c_cc[VTIME] = 10;
tcflush(fd, TCIFLUSH);
tcsetattr(fd, TCSANOW, &t_opt);
return fd;
}
int program_page(int fd, int page)
{
char cmd = 'p';
char rsp;
if (write(fd, &cmd, 1) <= 0)
return 1;
if (write(fd, &page, 1) <= 0)
return 1;
if (read(fd, &rsp, 1) <= 0 || rsp != 0)
return 1;
return 0;
}
int read_page(int fd, uint8_t page, uint8_t *data)
{
int remaining;
int rc;
char cmd = 'r';
char rsp;
if (write(fd, &cmd, 1) <= 0)
return 1;
if (write(fd, &page, 1) <= 0)
return 1;
remaining = 1024;
while(remaining > 0)
{
rc = read(fd, data + (1024 - remaining), remaining);
if (rc <= 0)
return 1;
remaining -= rc;
}
if (read(fd, &rsp, 1) <= 0 || rsp != 0)
return 1;
return 0;
}
int erase_page(int fd, uint8_t page)
{
char cmd = 'e';
char rsp;
if (write(fd, &cmd, 1) <= 0)
return 1;
if (write(fd, &page, 1) <= 0)
return 1;
if (read(fd, &rsp, 1) <= 0 || rsp != 0)
{
fprintf(stderr, "erase_page rsp=%02X\n", rsp);
return 1;
}
return 0;
}
int load_data(int fd, uint8_t *data)
{
int remaining;
int rc;
char cmd = 'l';
char rsp;
if (write(fd, &cmd, 1) <= 0)
return 1;
remaining = 1024;
while(remaining > 0)
{
rc = write(fd, data + (1024 - remaining), remaining);
if (rc <= 0)
return 1;
remaining -= rc;
}
if (read(fd, &rsp, 1) <= 0 || rsp != 0)
return 1;
return 0;
}
void dump(uint8_t *p, size_t len)
{
while(len--)
printf("%02X", *p++);
printf("\n");
}
int erase_program_verify_page(int fd, uint8_t *data, uint8_t page)
{
uint8_t verbuf[1024];
if (0 != load_data(fd, data))
{
fprintf(stderr, "load_data failed\n");
return 1;
}
if (0 != erase_page(fd, page))
{
fprintf(stderr, "erase_page failed\n");
return 1;
}
if (0 != program_page(fd, page))
{
fprintf(stderr, "program_page failed\n");
return 1;
}
if (0 != read_page(fd, page, verbuf))
{
fprintf(stderr, "read_page failed\n");
return 1;
}
if (0!=memcmp(verbuf, data, 1024))
{
fprintf(stderr, "verify failed\n");
printf("verbuf = ");
dump(verbuf, 1024);
printf("expected = ");
dump(data, 1024);
return 1;
}
return 0;
}
int wait_for_bootloader(int fd)
{
uint8_t c;
uint8_t prev_c = 0;
int attempts = 100;
while(attempts-- > 0)
{
printf("Waiting...\n");
if (read(fd, &c, 1) < 0)
return 1;
else
{
if (c == 'B' && prev_c == 'B')
break;
prev_c = c;
}
}
c = 0x00;
if (write(fd, &c, 1) <= 0)
return 1;
return 0;
}
int send_jump(int fd)
{
uint8_t cmd = 'j';
if (write(fd, &cmd, 1) <= 0)
return 1;
return 0;
}
int main(int argc, char *argv[])
{
int fd;
uint8_t buf[32*1024];
int i, j;
if (argc < 3)
{
fprintf(stderr, "Usage %s <serial device> <hex file>\n", argv[0]);
return 1;
}
fd = serial_open(argv[1]);
if (fd < 0)
{
fprintf(stderr, "Failed to open %s\n", argv[1]);
return 1;
}
memset(buf, 0xFF, sizeof(buf));
if (0 != read_hexfile(buf, sizeof(buf), argv[2]))
{
fprintf(stderr, "Failed to read %s\n", argv[2]);
return 1;
}
if (0 != wait_for_bootloader(fd))
{
fprintf(stderr, "No bootloader detected\n");
return 1;
}
for (i=0x400;i<32*1024;i+=1024)
{
bool all_empty = true;
for (j=i;j<i+1024;j++)
{
if (buf[j] != 0xFF)
{
all_empty = false;
break;
}
}
if (!all_empty)
{
printf("erase/write/verify page %d\n", i/1024);
if (0 != erase_program_verify_page(fd, buf + i, i/1024))
{
fprintf(stderr, "erase_program_verify_page failed\n");
return 1;
}
}
else
{
printf("erasing page %d\n", i/1024);
if (0 != erase_page(fd, i/1024))
{
fprintf(stderr, "erase failed\n");
return 1;
}
}
}
if (0 != send_jump(fd))
{
fprintf(stderr, "send jump failed\n");
}
close(fd);
return 0;
}
cctl-prog/hex.c
+198
View File
@@ -0,0 +1,198 @@
#include <stdio.h>
#include <unistd.h>
#include <ctype.h>
#include <getopt.h>
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <arpa/inet.h>
static uint8_t tolowercase(uint8_t ch)
{
if ((ch >= 'A') && (ch <= 'Z'))
return ch + 0x20; // Convert uppercase to lowercase
return ch; // Simply return original character if it doesn't require any adjustments
}
static int8_t parseHexDigit(uint8_t digit)
{
digit = tolowercase(digit);
if (isdigit(digit))
return (int8_t)digit - '0';
if ((digit >= 'a') && (digit <= 'f'))
return (int8_t)digit + 0xA - 'a';
return -1; // Error case - input wasn't a valid hex digit
}
static int hexstring_parse(const char *hexstr, uint8_t *buf, size_t *buflen)
{
size_t hexstrlen = *buflen * 2;
size_t i;
if (hexstrlen & 0x1)
{
fprintf(stderr, "hexstring_parse: not even\n");
return 1;
}
if (*buflen < hexstrlen/2)
{
fprintf(stderr, "hexstring_parse: buffer too small %d < %d\n", *buflen, hexstrlen/2);
return 1;
}
for (i=0;i<hexstrlen;i+=2)
{
int8_t a, b;
if (-1 == (a = parseHexDigit(hexstr[i])))
{
fprintf(stderr, "hexstring_parse: bad digit 0x%02X\n", hexstr[i]);
return 1;
}
if (-1 == (b = parseHexDigit(hexstr[i+1])))
{
fprintf(stderr, "hexstring_parse: bad digit 0x%02X\n", hexstr[i+1]);
return 1;
}
*buf++ = (a << 4) | b;
}
*buflen = hexstrlen/2;
return 0;
}
static int read_record(uint8_t *buf, size_t buflen, const char *line, bool *eof)
{
size_t len;
uint8_t sum = 0;
uint8_t record_sum;
uint8_t record_len;
uint8_t type;
uint16_t addr;
uint8_t data[256];
int i;
*eof = false;
if (line[0] != ':')
{
fprintf(stderr, "bad hexfile: no start\n");
return 1;
}
line+=1;
len = 1;
if (0 != hexstring_parse(line, &record_len, &len))
{
fprintf(stderr, "bad hexfile: no len '%s'\n", line);
return 1;
}
line+=len * 2;
len = 2;
if (0 != hexstring_parse(line, (uint8_t *)&addr, &len))
{
fprintf(stderr, "bad hexfile: no addr\n");
return 1;
}
addr = ntohs(addr);
line+=len * 2;
len = 1;
if (0 != hexstring_parse(line, &type, &len))
{
fprintf(stderr, "bad hexfile: no type\n");
return 1;
}
line+=len * 2;
len = record_len;
if (0 != hexstring_parse(line, data, &len))
{
fprintf(stderr, "bad hexfile: no data\n");
return 1;
}
line+=len * 2;
len = 1;
if (0 != hexstring_parse(line, &record_sum, &len))
{
fprintf(stderr, "bad hexfile: no sum\n");
return 1;
}
line+=len * 2;
if (type == 0)
{
sum += record_len;
sum += addr >> 8;
sum += addr & 0xFF;
for (i=0;i<record_len;i++)
sum += data[i];
sum = (sum ^ 0xFF) + 1;
if (sum != record_sum)
{
fprintf(stderr, "bad hexfile, checksum mismatch\n");
return 1;
}
if (addr + record_len > buflen)
{
fprintf(stderr, "bad hexfile, too big\n");
return 1;
}
memcpy(buf + addr, data, record_len);
}
else
if (type == 1)
{
*eof = true;
}
else
{
fprintf(stderr, "bad hexfile: unknown record type %02X\n", type);
}
return 0;
}
int read_hexfile(uint8_t *buf, size_t buflen, const char *filename)
{
FILE *fp;
char line[1024];
bool eof;
if (NULL == (fp = fopen(filename, "ro")))
return 1;
while (NULL != fgets(line, sizeof(line), fp))
{
char *p = (line + strlen(line)) - 1;
while(p > line)
{
if (isspace((int)(*p)))
*p = 0;
p--;
}
if (0 != read_record(buf, buflen, line, &eof))
goto fail;
if (eof)
break;
}
fclose(fp);
return 0;
fail:
fclose(fp);
return 1;
}
cctl-prog/hex.h
+7
View File
@@ -0,0 +1,7 @@
#ifndef HEX_H
#define HEX_H 1
int read_hexfile(uint8_t *buf, size_t buflen, const char *filename);
#endif
example_payload/Makefile
+50
View File
@@ -0,0 +1,50 @@
#
# CC Debugger - Example Payload
# Fergus Noble (c) 2011
#
CC = sdcc
CFLAGS = --model-small --opt-code-speed
# NOTE: code-loc should be the same as the value specified for
# USER_CODE_BASE in the bootloader!
LDFLAGS_FLASH = \
--out-fmt-ihx \
--code-loc 0x400 --code-size 0x8000 \
--xram-loc 0xf000 --xram-size 0x300 \
--iram-size 0x100
ifdef DEBUG
CFLAGS += --debug
endif
SRC = main.c
ADB=$(SRC:.c=.adb)
ASM=$(SRC:.c=.asm)
LNK=$(SRC:.c=.lnk)
LST=$(SRC:.c=.lst)
REL=$(SRC:.c=.rel)
RST=$(SRC:.c=.rst)
SYM=$(SRC:.c=.sym)
PROGS=example_payload.hex
PCDB=$(PROGS:.hex=.cdb)
PLNK=$(PROGS:.hex=.lnk)
PMAP=$(PROGS:.hex=.map)
PMEM=$(PROGS:.hex=.mem)
PAOM=$(PROGS:.hex=)
%.rel : %.c
$(CC) -c $(CFLAGS) -o$*.rel $<
all: $(PROGS)
example_payload.hex: $(REL) Makefile
$(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o example_payload.hex $(REL)
clean:
rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM)
rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM)
example_payload/main.c
+28
View File
@@ -0,0 +1,28 @@
#include "cc1110.h"
#define nop() __asm nop __endasm;
void delay (unsigned char n)
{
unsigned char i = 0;
unsigned char j = 0;
n <<= 1;
while (--n != 0)
while (--i != 0)
while (--j != 0)
nop();
}
void main(void)
{
// toggle P2_3
P2DIR |= (1<<3);
P2_3 = 0;
while (1)
{
P2_3 ^= 1;
delay(3);
}
}
prebuilt-cctl.hex
Executable
+121
View File
@@ -0,0 +1,121 @@
:060000000200AF02040340
:03000B0002040BE1
:0300130002009355
:03001B0002041BC1
:03002300020423B1
:03002B0002042BA1
:0300330002043391
:03003B0002043B81
:0300430002044371
:03004B0002044B61
:0300530002045351
:03005B0002045B41
:0300630002046331
:03006B0002046B21
:0300730002047311
:03007B0002047B01
:03008300020483F1
:03008B0002048BE1
:0A009300C0D030D105D0D00201DE4C
:05009D00D0D0020413A5
:030108000200A250
:0500A20012023A80FE8D
:0B010B00E5AE20E7FB75AB11E50A250F
:0A0116000AF5AD75AC0043AE010020
:06012000E5AE20E7FB2222
:0100A7000058
:0700A80043AE020002012932
:030126000200A82C
:0101290022B3
:07012A007A077BF88B0290BD
:07013100F7FFEAF07A077BFB
:07013800F890F800EAF090D6
:0C013F00F80174DFF090F80274AFF0904B
:0E014B00F803E4F0E0FA43020490F803EAF04F
:0C01590090F804E4F090F8057412F090A7
:08016500F8067442F07AFF7BFA
:06016D00F78BD57AFF7B41
:05017300F77B008AD4B7
:0B017800E5AE20E7FB75AB11E50A25A2
:0B0183000AFA743F5AF5AD43D6011292
:02018E00012648
:05019000E5D130E0FBA9
:08019500E5AE54C0600280F8E1
:04019D0053D1FE221A
:0901A100E509B50804758200228D
:0801AA00E5092400F582E434AC
:0701B200F0F583E0F50AAA55
:0801B900097B000ABA00010BEA
:0B01C100BAFF08BB07057509008002AB
:0201CC00050923
:0401CE007582012213
:0301D2008582C162
:0901D500E58630E1FB5386FD22B2
:0E01DE00C0E0C082C083C002C003C0D075D094
:0A01EC0000C28BE5082400F582E450
:0A01F60034F0F583E5C1F0AA087BA0
:06020000000ABA00010B28
:0B020600BAFF08BB0705750800800266
:020211000508DE
:0D021300D0D0D003D002D083D082D0E03212
:09022000900400E0FABAFF01228B
:0E022900C2AF759A0075B80075A800C2D10268
:030237000400229E
:03023A0053BEFBB5
:08023D00E5BE30E6FB75C6E9E1
:0C024500E5C630E6FB75C6A8750900751B
:0C0251000800AAF174FE5A4402F5F143C3
:0E025D00F30C7586C075C22275C50DC28BD21A
:07026B00AAD2D1D2AF7A0044
:03027200BA0800C7
:0E02750050138A030AEB9003B793F582C00280
:070283001201D2D00280E855
:06028A007AFF7BFF7C08F7
:0E029000C002C003C0041201A1E582D004D058
:0E029E0003D0027025EC60228A058B061ABA86
:0302AC00FF011B34
:0E02AF00ED4E70DD758242C002C003C0041225
:0B02BD0001D2D004D003D0021C80C886
:0602C800EC70031202209D
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