Merge pull request #1 from KryoStoffer/master
cc1110 Bootload using the radio interface
This commit is contained in:
Toby Jaffey committed
commit
9b9bfda1c2
10 files changed
+2793
-7
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+18
-7
@@ -9,8 +9,6 @@
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#include <getopt.h>
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#include <sys/time.h>
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#define SERIAL_TIMEOUT 2
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#ifdef __CYGWIN__
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#undef WIN32
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#endif
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@@ -35,6 +33,7 @@ static struct option long_options[] =
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{"device", required_argument, 0, 'd'},
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{"timeout", required_argument, 0, 't'},
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{"passthrough", no_argument, 0, 'p'},
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{"wireless", no_argument, 0, 'w'},
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{0, 0, 0, 0}
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};
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@@ -51,6 +50,7 @@ void usage(void)
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fprintf(stderr, " --flash=file.hex -f file.hex Reflash device with intel hex file\n");
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fprintf(stderr, " --timeout=n -t n Search for bootload string for n seconds\n");
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fprintf(stderr, " --passthrough -p Program remote device over passthrough\n");
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fprintf(stderr, " --wireless -w Program remote device over wireless ccrl\n");
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}
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static bool opt_console = false;
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@@ -60,6 +60,8 @@ static bool opt_device = false;
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static char *flash_filename = NULL;
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static char *device_name = NULL;
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static bool opt_passthrough = 0;
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static bool opt_wireless = 0;
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static int serial_timeout = 2;
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#ifndef WIN32
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static struct termios orig_termios;
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@@ -72,7 +74,7 @@ int parse_options(int argc, char **argv)
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while(1)
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{
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c = getopt_long (argc, argv, "hcf:d:t:p", long_options, &option_index);
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c = getopt_long (argc, argv, "hcf:d:t:p:w", long_options, &option_index);
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if (c == -1)
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break;
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switch(c)
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@@ -80,6 +82,10 @@ int parse_options(int argc, char **argv)
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case 'h':
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return 1;
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break;
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case 'w':
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opt_wireless = 1;
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serial_timeout = 4;
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break;
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case 'p':
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opt_passthrough = 1;
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break;
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@@ -260,7 +266,7 @@ int serialRead(int fd, void* buf, int len)
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return rc;
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gettimeofday(&now, NULL);
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}
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while((now.tv_sec - start.tv_sec) < SERIAL_TIMEOUT);
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while((now.tv_sec - start.tv_sec) < serial_timeout);
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return 1;
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}
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@@ -296,7 +302,7 @@ int serialWrite(int fd, void* buf, int len)
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return rc;
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gettimeofday(&now, NULL);
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}
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while((now.tv_sec - start.tv_sec) < SERIAL_TIMEOUT);
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while((now.tv_sec - start.tv_sec) < serial_timeout);
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return 1;
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}
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@@ -469,8 +475,8 @@ int wait_for_bootloader(int fd, int timeout)
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gettimeofday(&start, NULL);
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if (!opt_passthrough)
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serialWrite(fd, "+++", 3);
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if (!opt_passthrough && !opt_wireless)
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serialWrite(fd, "+++", 5);
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printf("Waiting %ds for bootloader, reset board now\n", timeout);
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@@ -497,6 +503,11 @@ int wait_for_bootloader(int fd, int timeout)
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if (c == 'P' && prev_c == 'P')
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break;
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}
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else if (opt_wireless)
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{
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if (c == 'W' && prev_c == 'W')
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break;
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}
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else
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{
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if (c == 'B' && prev_c == 'B')
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@@ -0,0 +1,69 @@
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PROG = /cygdrive/c/Program\ Files/Texas\ Instruments/SmartRF\ Tools/Flash\ Programmer/bin/SmartRFProgConsole.exe
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TARGET = cctl-rf.hex
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CC = sdcc
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AS = sdas8051
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CFLAGS = --model-small --opt-code-size --acall-ajmp
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LDFLAGS_FLASH = \
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--out-fmt-ihx \
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--code-loc 0x0000 --code-size 0x400 \
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--xram-loc 0xf000 --xram-size 0x1000 \
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--iram-size 0x100
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ASFLAGS = -plosgff
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ifdef DEBUG
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CFLAGS += --debug
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endif
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SRC = main.c
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ASM_SRC = start.asm
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ADB = $(SRC:.c=.c.adb)
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ASM = $(SRC:.c=.c.asm)
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LNK = $(SRC:.c=.c.lnk)
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LST = $(SRC:.c=.c.lst)
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REL = $(SRC:.c=.c.rel)
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RST = $(SRC:.c=.c.rst)
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SYM = $(SRC:.c=.c.sym)
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ASM_ADB = $(ASM_SRC:.asm=.adb)
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ASM_LNK = $(ASM_SRC:.asm=.lnk)
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ASM_LST = $(ASM_SRC:.asm=.lst)
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ASM_REL = $(ASM_SRC:.asm=.rel)
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ASM_RST = $(ASM_SRC:.asm=.rst)
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ASM_SYM = $(ASM_SRC:.asm=.sym)
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PROGS = $(TARGET)
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PCDB = $(PROGS:.hex=.cdb)
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PLNK = $(PROGS:.hex=.lnk)
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PMAP = $(PROGS:.hex=.map)
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PMEM = $(PROGS:.hex=.mem)
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PLK = $(PROGS:.hex=.lk)
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PAOM = $(PROGS:.hex=)
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%.c.rel : %.c
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$(CC) -c $(CFLAGS) -o$*.c.rel $<
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%.rel : %.asm
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$(AS) -c $(ASFLAGS) $<
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all: $(PROGS)
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$(TARGET): $(REL) $(ASM_REL) Makefile
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$(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o $(TARGET) $(ASM_REL) $(REL)
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@echo Binary size `makebin -p < $(TARGET) | wc -c`
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clean:
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rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM)
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rm -f $(ASM_ADB) $(ASM_LNK) $(ASM_LST) $(ASM_REL) $(ASM_RST) $(ASM_SYM)
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rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PLK) $(PAOM)
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install: $(TARGET)
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$(PROG) S EPV F="$(TARGET)"
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@@ -0,0 +1,80 @@
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ChipCon Tiny Loader Radio Version
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=================================
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A bootloader that can replace the original cctl in places where you don't want to load software via serial cable. This is achieved by using the wireless radio interface of the CC1110.
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The readme has only limited information, experience in using the serial version of the cctl is recommended, see the readme of cctl.
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Usage
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-----
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You need 2 cc1110 boards, a device that can run the cctl-prog, and a way to to load the bootloaders, see readme of cctl.
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First board should be loaded with a bootloader and the sensemote app ChipCon Radio Loader (ccrl).
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Second board should have the cctl-rf bootloader.
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Connect the first board via serial to the device running the cctl-prog.
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Use the cctl-prog with the -w option.
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Building
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--------
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The code has been tested with SDCC, version 3.2.0
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Radio Protocol
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--------------
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On reset the bootloader will send 18 packets containing the following:
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<- `0x02 0xFD 0x10`
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waiting for a reponse like:
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-> `0x02 0xFE 0x10`
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If a response is received, the bootloader will enter upgrade mode.
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If no packet is received, the bootloader will attempt to launch user code from 0x400.
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The bootloader enables the watchdog with a 1s timeout while running. It does not engage the hardware watchdog when jumping to user code (as the watchdog cannot be disabled making it incompatible with applications which remain in deep sleep for long periods).
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Once in upgrade mode, the bootloader expects to receive at least one packet per second, otherwise it will reset using the hardware watchdog.
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In upgrade mode the following commands are available:
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### Erase page
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Erase a 1KB page of flash.
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-> `0x04 0xFE 0x01`, `uint8_t page` (0-31), `0x00`
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<- `0x04 0xFD 0x01`, `uint8_t page` (0-31), `0x00`
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### Program page
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Program a 1KB page of flash from RAM buffer.
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-> `0x04 0xFE 0x02`, `uint8_t page` (0-31), `0x00`
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<- `0x04 0xFD 0x02`, `uint8_t page` (0-31), `0x00`
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### Read segment
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Read 64 byte segment from flash.
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-> `0x04 0xFE 0x03`, `uint8_t page` (0-31), `uint8_t segment` (0-15)
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<- `0x44 0xFD 0x03`, `uint8_t page` (0-31), `uint8_t segment` (0-15), `uint8_t data[64]`
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### Load page
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Load 64 byte segment to RAM buffer.
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-> `0x44 0xFE 0x04`, `uint8_t page` (ignored), `uint8_t segment` (0-15), `uint8_t data[64]`
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<- `0x04 0xFD 0x04`, `uint8_t page` (ignored), `uint8_t segment` (0-15)
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### Jump to user code
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-> 0x02 0xFE 0x05
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File diff suppressed because it is too large.
Load diff
+555
@@ -0,0 +1,555 @@
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/*
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* CCTL-RF - ChipCon Tiny Loader Radio Version
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* A 1KB RF bootloader for the CC1110/CC1111
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*
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* Kristoffer Larsen (c) 2012 <kri@kri.dk>
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*
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* Based on Serial bootload from
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* Joby Taffey (c) 2012 <jrt-cctl@hodgepig.org>
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*
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* Derived from CC Bootloader
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* Fergus Noble (c) 2011
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*/
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// Select crystal frequency
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// Remember to change in start.asm also.
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#define CRYSTAL_26_MHZ
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//#define CONSOLE_DEBUG
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#include <stdint.h>
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#include <cc1110.h>
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#include "cc1110-ext.h"
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#define RADIOBUF_MAX 256
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// Flash write timer value:
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// FWT = 21000 * FCLK / (16 * 10^9)
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// For FCLK = 24MHz, FWT = 0x1F
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// For FCLK = 26MHz, FWT = 0x11
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#ifdef CRYSTAL_26_MHZ
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#define FLASH_FWT 0x1F
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#endif
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#ifdef CRYSTAL_24_MHZ
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#define FLASH_FWT 0x11
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#endif
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// Address of flash controller data register
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#define FLASH_FWDATA_ADDR 0xDFAF
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static __xdata struct cc_dma_channel dma0_config;
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static __xdata uint8_t radiobuf[RADIOBUF_MAX];
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static uint8_t radiobuf_index;
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#ifdef CONSOLE_DEBUG
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static __xdata uint8_t * __at (0x0000) flashp;
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#endif
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__xdata uint8_t rambuf[1024];
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struct cc_dma_channel
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{
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uint8_t src_high;
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uint8_t src_low;
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uint8_t dst_high;
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uint8_t dst_low;
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uint8_t len_high;
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uint8_t len_low;
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uint8_t cfg0;
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uint8_t cfg1;
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};
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#define DMA_CFG0_TRIGGER_FLASH 18
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#define DMA_CFG1_SRCINC_1 (1 << 6)
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#define DMA_CFG1_DESTINC_0 (0 << 4)
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#define DMA_CFG1_PRIORITY_HIGH (2 << 0)
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#define DMAARM_DMAARM0 (1 << 0)
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#define DMA_LEN_HIGH_VLEN_MASK (7 << 5)
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#define DMA_LEN_HIGH_VLEN_LEN (0 << 5)
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#define DMA_LEN_HIGH_VLEN_PLUS_1 (1 << 5)
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#define DMA_LEN_HIGH_VLEN (2 << 5)
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#define DMA_LEN_HIGH_VLEN_PLUS_2 (3 << 5)
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#define DMA_LEN_HIGH_VLEN_PLUS_3 (4 << 5)
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#define DMA_LEN_HIGH_MASK (0x1f)
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#define DMA_CFG0_WORDSIZE_8 (0 << 7)
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#define DMA_CFG0_WORDSIZE_16 (1 << 7)
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#define DMA_CFG0_TMODE_MASK (3 << 5)
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#define DMA_CFG0_TMODE_SINGLE (0 << 5)
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#define DMA_CFG0_TMODE_BLOCK (1 << 5)
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#define DMA_CFG0_TMODE_REPEATED_SINGLE (2 << 5)
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#define DMA_CFG0_TMODE_REPEATED_BLOCK (3 << 5)
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void flash_erase_page(void)
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{
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while (FCTL & FCTL_BUSY);
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FWT = FLASH_FWT;
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FADDRH = radiobuf[3] << 1;
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FADDRL = 0x00;
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// Erase the page that will be written to
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FCTL |= FCTL_ERASE;
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__asm nop __endasm;
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// Wait for the erase operation to complete
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while (FCTL & FCTL_BUSY) {}
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}
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void flash_write_trigger(void)
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{
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// Enable flash write. Generates a DMA trigger. Must be aligned on a 2-byte
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// boundary and is therefore implemented in assembly.
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// p.s. if this looks a little crazy its because it is, sdcc doesn't currently
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// support explicitly specifying code alignment which would make this easier
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__asm
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.globl flash_write_trigger_instruction
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.globl flash_write_trigger_done
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; Put our trigger instruction in the HOME segment (shared with some startup code)
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; where it wont move around too much
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.area HOME (CODE)
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; Comment or uncomment these lines to adjust if you change the start.asm code
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nop ; Padding to get onto 16-bit boundary
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flash_write_trigger_instruction:
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orl _FCTL, #0x02 ; FCTL |= FCTL_ERASE
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nop ; Required, see datasheet.
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ljmp flash_write_trigger_done ; Jump back into our function
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; Meanwhile, back in the main CSEG segment...
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.area CSEG (CODE)
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; Jump to the trigger instruction
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ljmp flash_write_trigger_instruction
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flash_write_trigger_done:
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__endasm;
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}
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void flash_write(void)
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{
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// Setup DMA descriptor
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dma0_config.src_high = (((uint16_t)(__xdata uint16_t *)rambuf) >> 8) & 0x00FF;
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dma0_config.src_low = ((uint16_t)(__xdata uint16_t *)rambuf) & 0x00FF;
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dma0_config.dst_high = (FLASH_FWDATA_ADDR >> 8) & 0x00FF;
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dma0_config.dst_low = FLASH_FWDATA_ADDR & 0x00FF;
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dma0_config.len_high = DMA_LEN_HIGH_VLEN_LEN;
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dma0_config.len_high |= ((1024) >> 8) & DMA_LEN_HIGH_MASK;
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dma0_config.len_low = (1024) & 0x00FF;
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dma0_config.cfg0 = \
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DMA_CFG0_WORDSIZE_8 | \
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DMA_CFG0_TMODE_SINGLE | \
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DMA_CFG0_TRIGGER_FLASH;
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dma0_config.cfg1 = \
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DMA_CFG1_SRCINC_1 | \
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DMA_CFG1_DESTINC_0 | \
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DMA_CFG1_PRIORITY_HIGH;
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// Point DMA controller at our DMA descriptor
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DMA0CFGH = ((uint16_t)&dma0_config >> 8) & 0x00FF;
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DMA0CFGL = (uint16_t)&dma0_config & 0x00FF;
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// Waiting for the flash controller to be ready
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while (FCTL & FCTL_BUSY);
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// Configure the flash controller
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FWT = FLASH_FWT;
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FADDRH = (radiobuf[3] << 1) & 0x3F;
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//FADDRL = 0;//(radiobuf[3] << 9) & 0xFF; // reset value is 0x00
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// Arm the DMA channel, so that a DMA trigger will initiate DMA writing
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DMAARM |= DMAARM_DMAARM0;
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// Enable flash write - triggers the DMA transfer
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flash_write_trigger();
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// Wait for DMA transfer to complete
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while (!(DMAIRQ & DMAIRQ_DMAIF0));
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// Wait until flash controller not busy
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while (FCTL & (FCTL_BUSY | FCTL_SWBSY));
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// By now, the transfer is completed, so the transfer count is reached.
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// The DMA channel 0 interrupt flag is then set, so we clear it here.
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DMAIRQ &= ~DMAIRQ_DMAIF0;
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}
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void jump_to_user(void)
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{
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if (*((__xdata uint8_t*)0x400) != 0xFF)
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{
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// Disable all interrupts
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EA = 0;
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IEN0 = IEN1 = IEN2 = 0;
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// bootloader not running
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F1 = 0;
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// Jump to user code
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__asm
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ljmp #0x400
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__endasm;
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}
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}
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#ifdef CONSOLE_DEBUG
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void cons_putc(uint8_t ch)
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{ U0DBUF = ch;
|
||||
while(!(U0CSR & U0CSR_TX_BYTE)); // wait for byte to be transmitted
|
||||
U0CSR &= ~U0CSR_TX_BYTE; // Clear transmit byte status
|
||||
}
|
||||
|
||||
char nibble_to_char(uint8_t nibble)
|
||||
{
|
||||
if (nibble < 0xA)
|
||||
return nibble + '0';
|
||||
return nibble - 0xA + 'A';
|
||||
}
|
||||
|
||||
void cons_puthex8(uint8_t h)
|
||||
{
|
||||
cons_putc(nibble_to_char((h & 0xF0)>>4));
|
||||
cons_putc(nibble_to_char(h & 0x0F));
|
||||
}
|
||||
|
||||
void cons_puthex16(uint16_t h)
|
||||
{
|
||||
cons_putc(nibble_to_char((h & 0xF000)>>12));
|
||||
cons_putc(nibble_to_char((h & 0x0F00)>>8));
|
||||
cons_putc(nibble_to_char((h & 0x00F0)>>4));
|
||||
cons_putc(nibble_to_char(h & 0x000F));
|
||||
}
|
||||
|
||||
void cons_puts(const char *s)
|
||||
{
|
||||
while(0 != *s)
|
||||
cons_putc((uint8_t)(*s++));
|
||||
}
|
||||
#endif
|
||||
|
||||
void rftxrx_isr(void) __interrupt RFTXRX_VECTOR {
|
||||
switch (MARCSTATE) {
|
||||
case MARC_STATE_RX:
|
||||
radiobuf[radiobuf_index] = RFD;
|
||||
goto inc; // stupid way but saves space.
|
||||
break;
|
||||
case MARC_STATE_TX:
|
||||
RFD = radiobuf[radiobuf_index];
|
||||
inc:
|
||||
radiobuf_index++;
|
||||
break;
|
||||
}
|
||||
}
|
||||
void tx_pkt(void) {
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("Start TX\r\n");
|
||||
#endif
|
||||
|
||||
T3CTL=0xDC; // User Timer3 to delay TX, without the delay the programer does not have time to switch from TX to RX.
|
||||
T3OVFIF=0;
|
||||
while (!T3OVFIF);
|
||||
T3CTL=0;
|
||||
radiobuf[1]=0xFD; // Set dev once to save space
|
||||
radiobuf_index=0;
|
||||
RFST = RFST_STX; /* enter TX */
|
||||
while(MARCSTATE != MARC_STATE_TX);
|
||||
//while (!(RFIF & RFIF_IRQ_DONE));
|
||||
while(MARCSTATE != MARC_STATE_IDLE);
|
||||
RFIF =0;
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("Done TX\r\n");
|
||||
#endif
|
||||
}
|
||||
uint8_t rx_pkt(void) {
|
||||
if (RFIF & RFIF_IRQ_DONE) {
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("\r\nR");
|
||||
cons_puthex8(LQI);
|
||||
cons_puthex8(RFIF);
|
||||
cons_puthex8(radiobuf[0]);
|
||||
cons_puthex8(radiobuf[1]);
|
||||
cons_puthex8(radiobuf[2]);
|
||||
cons_puthex8(radiobuf[3]);
|
||||
cons_puthex8(radiobuf[4]);
|
||||
cons_puthex8(radiobuf[5]);
|
||||
cons_puthex8(radiobuf[6]);
|
||||
cons_puthex8(radiobuf[7]);
|
||||
cons_puts("\r\n");
|
||||
#endif
|
||||
RFIF =0;
|
||||
if (LQI & 0x80) { // packet has valid CRC
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("Valid CRC\r\n");
|
||||
#endif
|
||||
while(MARCSTATE != MARC_STATE_IDLE);
|
||||
return 1;
|
||||
} else {
|
||||
radiobuf_index=0;
|
||||
}
|
||||
}
|
||||
if (MARCSTATE != MARC_STATE_RX) {
|
||||
radiobuf_index=0;
|
||||
RFST = RFST_SRX; // Set RX mode
|
||||
while (MARCSTATE != MARC_STATE_RX);
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("Start RX\r\n");
|
||||
#endif
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void radio_init(void) {
|
||||
uint8_t a,b;
|
||||
uint16_t p;
|
||||
uint8_t conf;
|
||||
p=0xDF00; // SYNC1 position
|
||||
b=0;
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("\r\nRadio Init\r\n");
|
||||
#endif
|
||||
for (a=22;a<72;a++) {
|
||||
#ifdef CONSOLE_DEBUG
|
||||
//cons_puthex8(a);
|
||||
//cons_puts(" ");
|
||||
//cons_puthex16(p);
|
||||
//cons_puts(" ");
|
||||
//cons_puthex8(flashp[a]);
|
||||
#endif
|
||||
|
||||
conf=*(__xdata uint8_t*)a;
|
||||
*(__xdata uint8_t*)p=conf;
|
||||
#ifdef CONSOLE_DEBUG
|
||||
//cons_puts(" ");
|
||||
cons_puthex8(flashp[p]);
|
||||
cons_puthex8(conf);
|
||||
cons_puts("\r\n");
|
||||
#endif
|
||||
b++;
|
||||
p++;
|
||||
if (b>4) {
|
||||
b=0;
|
||||
a=a+3;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* 250kbaud @ 868MHz from RF Studio 7 */
|
||||
|
||||
/*
|
||||
SYNC1 = 0xD3; // Sync Word, High Byte
|
||||
SYNC0 = 0x91; // Sync Word, Low Byte
|
||||
PKTLEN = 0x50; // Packet Length
|
||||
PKTCTRL1 = 0x05; // Packet Automation Control , Only accept ADDR filter.
|
||||
PKTCTRL0 = 0x05; // Packet Automation Control
|
||||
ADDR = 0xFE; // Device Address
|
||||
CHANNR = 0x00; // Channel Number
|
||||
FSCTRL1 = 0x0C; // Frequency Synthesizer Control
|
||||
FSCTRL0 = 0x00; // Frequency Synthesizer Control
|
||||
#ifdef CRYSTAL_26_MHZ
|
||||
FREQ2 = 0x21; // Frequency Control Word, High Byte
|
||||
FREQ1 = 0x65; // Frequency Control Word, Middle Byte
|
||||
FREQ0 = 0x6A; // Frequency Control Word, Low Byte
|
||||
#endif
|
||||
#ifdef CRYSTAL_24_MHZ
|
||||
FREQ2 = 0x24; // Frequency Control Word, High Byte
|
||||
FREQ1 = 0x2D; // Frequency Control Word, Middle Byte
|
||||
FREQ0 = 0xDD; // Frequency Control Word, Low Byte
|
||||
#endif
|
||||
#ifdef CRYSTAL_26_MHZ
|
||||
MDMCFG4 = 0x2D; // Modem configuration
|
||||
MDMCFG3 = 0x3B; // Modem Configuration
|
||||
#endif
|
||||
#ifdef CRYSTAL_24_MHZ
|
||||
MDMCFG4 = 0x1D; // Modem configuration
|
||||
MDMCFG3 = 0x55; // Modem Configuration
|
||||
#endif
|
||||
MDMCFG2 = 0x13; // Modem Configuration
|
||||
|
||||
MDMCFG1 = 0x22; // Modem Configuration
|
||||
MDMCFG0 = 0xF8; // Modem Configuration
|
||||
DEVIATN = 0x62; // Modem Deviation Setting
|
||||
MCSM2 = 0x07; // Main Radio Control State Machine Configuration
|
||||
MCSM1 = 0x30; // Main Radio Control State Machine Configuration
|
||||
MCSM0 = 0x18; // Main Radio Control State Machine Configuration
|
||||
FOCCFG = 0x1D; // Frequency Offset Compensation Configuration
|
||||
BSCFG = 0x1C; // Bit Synchronization Configuration
|
||||
AGCCTRL2 = 0xC7; // AGC Control
|
||||
AGCCTRL1 = 0x00; // AGC Control
|
||||
AGCCTRL0 = 0xB0; // AGC Control
|
||||
FREND1 = 0xB6; // Front End RX Configuration
|
||||
FREND0 = 0x10; // Front End TX Configuration
|
||||
FSCAL3 = 0xEA; // Frequency Synthesizer Calibration
|
||||
FSCAL2 = 0x2A; // Frequency Synthesizer Calibration
|
||||
FSCAL1 = 0x00; // Frequency Synthesizer Calibration
|
||||
FSCAL0 = 0x1F; // Frequency Synthesizer Calibration
|
||||
*/
|
||||
//TEST2 = 0x88; // Various Test Settings
|
||||
TEST1 = 0x31; // Various Test Settings
|
||||
TEST0 = 0x09; // Various Test Settings
|
||||
//PA_TABLE7 = 0x00; // PA Power Setting 7
|
||||
//PA_TABLE6 = 0x00; // PA Power Setting 6
|
||||
//PA_TABLE5 = 0x00; // PA Power Setting 5
|
||||
//PA_TABLE4 = 0x00; // PA Power Setting 4
|
||||
//PA_TABLE3 = 0x00; // PA Power Setting 3
|
||||
//PA_TABLE2 = 0x00; // PA Power Setting 2
|
||||
//PA_TABLE1 = 0x00; // PA Power Setting 1
|
||||
PA_TABLE0 = 0x50; // PA Power Setting 0
|
||||
//IOCFG2 = 0x00; // Radio Test Signal Configuration (P1_7)
|
||||
//IOCFG1 = 0x00; // Radio Test Signal Configuration (P1_6)
|
||||
//IOCFG0 = 0x00; // Radio Test Signal Configuration (P1_5)
|
||||
//FREQEST = 0x00; // Frequency Offset Estimate from Demodulator
|
||||
//LQI = 0x00; // Demodulator Estimate for Link Quality
|
||||
//RSSI = 0x80; // Received Signal Strength Indication
|
||||
//MARCSTATE = 0x01; // Main Radio Control State Machine State
|
||||
//PKTSTATUS = 0x00; // Packet Status
|
||||
//VCO_VC_DAC = 0x94; // Current Setting from PLL Calibration Module
|
||||
|
||||
#ifdef TX_HIGHPOWER_ENABLED
|
||||
PA_TABLE0 = 0xC2; /* turn power up to 10dBm */
|
||||
#endif
|
||||
#if 0
|
||||
IEN2 |= IEN2_RFIE;
|
||||
RFIM |= RFIF_IRQ_DONE | RFIF_IRQ_TXUNF | RFIF_IRQ_RXOVF | RFIF_IRQ_SFD | RFIF_IRQ_TIMEOUT;
|
||||
#endif
|
||||
radiobuf_index = RFIF = 0;
|
||||
RFTXRXIF = 0; /* enable interrupts */
|
||||
RFTXRXIE = 1;
|
||||
RFST = RFST_SIDLE; /* enter idle */
|
||||
while(MARCSTATE != MARC_STATE_IDLE);
|
||||
}
|
||||
|
||||
|
||||
|
||||
void bootloader_main(void) {
|
||||
uint8_t n;
|
||||
uint16_t i;
|
||||
|
||||
// Initialise clocks
|
||||
SLEEP &= ~SLEEP_OSC_PD; // enable RC oscillator
|
||||
while( !(SLEEP & SLEEP_XOSC_S) ); // let oscillator stabilise
|
||||
|
||||
CLKCON = CLKCON_OSC32 | CLKCON_OSC | TICKSPD_DIV_32 | CLKSPD_DIV_2; // select internal HS RC oscillator
|
||||
while (!(CLKCON & CLKCON_OSC));
|
||||
|
||||
CLKCON = CLKCON_OSC32 | TICKSPD_DIV_32 | CLKSPD_DIV_1; // select external crystal
|
||||
|
||||
while (CLKCON & CLKCON_OSC);
|
||||
SLEEP |= SLEEP_OSC_PD; // Disable RC oscillator now that we have an external crystal
|
||||
|
||||
#ifdef CONSOLE_DEBUG
|
||||
PERCFG = (PERCFG & ~PERCFG_U0CFG) | PERCFG_U1CFG;
|
||||
P0SEL |= (1<<3) | (1<<2);
|
||||
U0CSR = 0x80 | 0x40; // UART, RX on
|
||||
U0BAUD = 34; // 115200
|
||||
U0GCR = 13; // 115k2 baud at 13MHz, useful for coming out of sleep. Assumes clkspd_div2 in clkcon for HSRC osc
|
||||
#endif
|
||||
|
||||
radio_init();
|
||||
|
||||
F1 = 1;
|
||||
EA = 1;
|
||||
|
||||
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("\r\nBOOT\r\n");
|
||||
#endif
|
||||
n = 20;
|
||||
i = 65535;
|
||||
while(n > 2) {
|
||||
if (rx_pkt()) n=0;
|
||||
if (i-- == 0) {
|
||||
radiobuf[0] = 2;
|
||||
radiobuf[2] = 0x10;
|
||||
tx_pkt();
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_putc('W');
|
||||
#endif
|
||||
n--;
|
||||
}
|
||||
}
|
||||
if (n == 0)
|
||||
goto upgrade_loop;
|
||||
|
||||
jump_to_user();
|
||||
|
||||
upgrade_loop:
|
||||
WDCTL = 0x08; //Enable watchdog with 1s timeout
|
||||
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("Starting Upgrade loop\r\n");
|
||||
#endif
|
||||
|
||||
while(1) {
|
||||
if (rx_pkt()) {
|
||||
WDCTL = 0xA8; WDCTL = 0x58;
|
||||
switch (radiobuf[2]) {
|
||||
case 0:
|
||||
goto ack;
|
||||
case 1: //erase page
|
||||
flash_erase_page();
|
||||
goto ack;
|
||||
break;
|
||||
case 2: //program page from rambuffer
|
||||
flash_write();
|
||||
goto ack;
|
||||
break;
|
||||
case 3: //read page segment from flash
|
||||
radiobuf[0]=68;
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("Read\r\n");
|
||||
#endif
|
||||
i=(radiobuf[3]<<10)+(radiobuf[4]<<6);
|
||||
for (n=5;n<69;n++) {
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puthex8(flashp[i]);
|
||||
#endif
|
||||
radiobuf[n]=*(__xdata uint8_t*)i;
|
||||
i++;
|
||||
}
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("\r\n");
|
||||
#endif
|
||||
tx_pkt();
|
||||
break;
|
||||
case 4:
|
||||
#ifdef CONSOLE_DEBUG
|
||||
cons_puts("Load Segment to ram\r\n");
|
||||
#endif
|
||||
i=radiobuf[4]<<6;
|
||||
for (n=5;n<69;n++) {
|
||||
rambuf[i]=radiobuf[n];
|
||||
i++;
|
||||
}
|
||||
goto ack;
|
||||
break;
|
||||
case 5:
|
||||
jump_to_user();
|
||||
ack:
|
||||
radiobuf[0] = 4;
|
||||
tx_pkt();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,279 @@
|
||||
:1004E7007E007F007508007D0AED602DE508702904
|
||||
:1004F700EE4F700F90F000C005120F8BD0057E886D
|
||||
:100507007F131D1EBEFF011FC007C006C005120BCB
|
||||
:10051700D0D005D006D00780D0ED600475820122C7
|
||||
:100527007582011211A375820022020F5FC009E5CF
|
||||
:1005370081F5092406F581AF090F7E007D408F8282
|
||||
:100547008E838DF0121116E58270030207AEA8099B
|
||||
:1005570008B6000302078AA809088607BF65028054
|
||||
:100567001ABF6A0302076FBF6C03020689BF7002D6
|
||||
:10057700804FBF720302060E0207AEE5092403FF90
|
||||
:100587007E007D408F828E838DF0121116E582608A
|
||||
:10059700EA90F0007404F090F00174FEF090F0021D
|
||||
:1005A7007401F0E5092403F8741F5690F003F090E6
|
||||
:1005B700F004E4F01204E7E58270030207AE0207D5
|
||||
:1005C700A8E5092403FF7E007D408F828E838DF08E
|
||||
:1005D700121116E58260EA90F0007404F090F001C1
|
||||
:1005E70074FEF090F0027402F0E5092403F8741F1A
|
||||
:1005F7005690F003F090F004E4F01204E7E58270FF
|
||||
:10060700030207AE0207A8E5092403FF7E007D4029
|
||||
:100617008F828E838DF0121116E58260EA7F00BF0C
|
||||
:100627001000503390F0007404F090F00174FEF065
|
||||
:1006370090F0027403F0E5092403F8741F5690F054
|
||||
:1006470003F0740F5F90F004F0C0071204E7E5822F
|
||||
:10065700D00760030F80C87E007F00EF54FC600363
|
||||
:100667000207A8EE2450F582EF34F0F583E0F58217
|
||||
:10067700C007C0061211A3D006D0070EBE00DC0FBC
|
||||
:1006870080D97E007F00EF54FC7035E5092402FD18
|
||||
:100697007C007B408D828C838BF0C007C0061211D3
|
||||
:1006A70016E582D006D00760E2EE2450F582EF34DB
|
||||
:1006B700F0F583A8090808E6F00EBE00C90F80C64A
|
||||
:1006C700E4FEFFE5092404F87600E5092404F8B6FA
|
||||
:1006D700100040030207A890F0007444F090F00166
|
||||
:1006E70074FEF090F0027404F090F003E4F0E50972
|
||||
:1006F7002404F8740F5690F004F08E038F04E50974
|
||||
:100707002405F87605087600E5092405F8C3E6947C
|
||||
:100717004508E694005035E5092405F8E62400FF6E
|
||||
:1007270008E634F0FE8B028C050BBB00010CEA24B3
|
||||
:1007370050F582ED34F0F583E0FD8F828E83F0E58E
|
||||
:10074700092405F806B60002080680BC8B068C074C
|
||||
:10075700C007C0061204E7E582D006D0076042E56D
|
||||
:10076700092404F8060206D190F0007402F090F014
|
||||
:100777000174FEF090F0027405F01204E7E5826060
|
||||
:1007870026801E90F0007404F090F00174FEF09043
|
||||
:10079700F002E4F090F003F090F004F01204E78028
|
||||
:1007A700067582001211A3850981D009222222220F
|
||||
:1007B700020F5FC009E581F5092404F581AE82AA1D
|
||||
:1007C70083A3E0FDE4BDFD0104FD60228E828A83E0
|
||||
:1007D700A3A3E0FC90F002E0FBECB50304740180F6
|
||||
:1007E70001E4FC6009EC6006EC6003750801ED703C
|
||||
:1007F7000302087B8E828A83A3A3E0FCBC03757483
|
||||
:10080700042EFBE43AFCA80908E4F608F6A8090850
|
||||
:10081700C3E6944008E69400506E8B828C83E0FF19
|
||||
:10082700C003C004EF75F040A4FFADF0A80908EFBE
|
||||
:1008370026FFED0836FDE5092403F8EF2450F6ED11
|
||||
:1008470034F008F6A80908740526FBE40836FFEB20
|
||||
:100857002EF582EF3AF583E0FFE5092403F8868257
|
||||
:10086700088683EFF0A8090806B600020806D00438
|
||||
:10087700D0038099ED60118E828A83A3A3E0FFBF26
|
||||
:1008870010067582571211A390F9A8E02401F0A36E
|
||||
:0A089700E03400F0850981D0092249
|
||||
:0213F1000000FA
|
||||
:1008A100AFBE74FB5FF5BEE5BE30E6FB75C6E9E59C
|
||||
:1008B100C630E6FB75C6A8E5C620E6FB43BE0422AA
|
||||
:1008C100222274FC55C94403F5C9AFC974FB5FF515
|
||||
:1008D100C943C90880FEC0E0C082C083C0D0759CF6
|
||||
:1008E100FF90F452E02401F0D0D0D083D082D0E048
|
||||
:1008F1003290F450E4F0A3F090F452F00209007544
|
||||
:100901009D0DAF9E74FC5F4404F59E439E10D2BAC8
|
||||
:100911002290F452E0FE7F00AC9C7D0074FFC39CEA
|
||||
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||||
:20033200F00AE0FF24FA40EBEF2F90034073614C614E6152615661A661E161E311F461E389
|
||||
:20035200311661E390F0087444F090F00BE025E025E0FE7F0090F00CE0FDE4C3CD13CD130E
|
||||
:20037200A2E0CD13CD13CDFCED2FFFEC3EFE7D05BD4500501BED2408FBE434F0FC8F828E77
|
||||
:2003920083E0FA8B828C83F00FBF00010E0D80E031F2612590F00CE0FFE4C3CF13CF13A277
|
||||
:2003B200E0CF13CF13CFFE7D05BD45005023EF2408FBEE34F1FCED2408F582E434F0F5838E
|
||||
:1B03D200E0FA8B828C83F00FBF00010E0D80DA319190F0087404F031F261258B
|
||||
:0600C700E478FFF6D8FD0D
|
||||
:2000A5007900E94400601B7A009003F17800759300E493F2A308B800020593D9F4DAF27528
|
||||
:0200C50093FFA7
|
||||
:2000CD007800E84400600A79007593F0E4F309D8FC7808E84405600C790690F000E4F0A34D
|
||||
:0400ED00D8FCD9FA68
|
||||
:0D0098007581081203EDE582600302008E01
|
||||
:0403ED0075820022F3
|
||||
:00000001FF
|
||||
@@ -0,0 +1,48 @@
|
||||
:0900000002009830D1080201ABA6
|
||||
:06000B0002040B020403D5
|
||||
:20001300020413D391FF054502041BFE000C0021020423656A2D3B1302042B22F862073064
|
||||
:15003300020433181D1CC70002043BB0B610EA2A020443001F34
|
||||
:03004B0002044B61
|
||||
:0300530002045351
|
||||
:03005B0002045B41
|
||||
:0300630002046331
|
||||
:03006B0002046B21
|
||||
:0300730002047311
|
||||
:03007B0002047B01
|
||||
:03008300020483F1
|
||||
:03008B0002048BE1
|
||||
:0300F10002008E7C
|
||||
:02008E0051AF70
|
||||
:1E00F400E5AE20E7FB75AB1F90F00BE0FF25E0F5AD75AC0043AE0100E5AE20E7FB223F
|
||||
:080090000043AE02000201155D
|
||||
:20011200020091227E087FF18F0690F000EEF07E087FF190F001EEF090F00274DFF090F095
|
||||
:200132000374AFF090F004E4F090F004E04404F090F005E4F090F0067412F090F007744211
|
||||
:20015200F07E007FF08F068ED57E007FF07F008ED4E5AE20E7FB75AB1F90F00BE025E0FFA7
|
||||
:20017200743F5FF5AD43D6013112E5D130E0FBE5AE54C0600280F8AFD174FE5FF5D1229051
|
||||
:200192000400E0FFBFFF0122C2AF759A0075B80075A800C2D102040022C0E0C082C083C01F
|
||||
:2001B20007C0D075D00090DF3BE0FFBF0D028005BF13228010E5082408F582E434F0F583E1
|
||||
:2001D200E5D9F0800EE5082408F582E434F0F583E0F5D90508D0D0D007D083D082D0E03208
|
||||
:2001F20075CBDCC2D830D8FD75CB0090F00974FDF075080075E10390DF3BE0FFBF13F8904F
|
||||
:20021200DF3BE0FFBF01F875E90022E5E930E41A75E90090DF39E0FF30E70C90DF3BE0FF0E
|
||||
:20023200BF01F87582012275080090DF3BE0FFBF0D02800E75080075E10290DF3BE0FFBF5B
|
||||
:200252000DF8758200227F007E167C007DDFBE480050228E027B008A828B83E0FA8C828D71
|
||||
:2002720083F00F0CBC00010DEF24FB50057F000E0E0E0E80D990DF247431F090DF25740968
|
||||
:20029200F090DF2E7450F075E900750800C289D2A875E10490DF3BE0FFBF01F822AFBE74CD
|
||||
:2002B200FB5FF5BEE5BE30E6FB75C6E9E5C630E6FB75C6A8E5C620E6FB43BE045158D2D1AB
|
||||
:2002D200D2AF7F147DFF7EFFEF24FD503EC007C006C005511DE582D005D006D00760027FD7
|
||||
:2002F200008D038E041DBDFF011EEB4C70DA90F0087402F090F00A7410F0C007C006C00513
|
||||
:2003120031F2D005D006D0071F80BDEF6002319175C908511DE58260FA75C9A875C9589036
|
||||
:20033200F00AE0FF24FA40EBEF2F90034073614C614E6152615661A661E161E311F461E389
|
||||
:20035200311661E390F0087444F090F00BE025E025E0FE7F0090F00CE0FDE4C3CD13CD130E
|
||||
:20037200A2E0CD13CD13CDFCED2FFFEC3EFE7D05BD4500501BED2408FBE434F0FC8F828E77
|
||||
:2003920083E0FA8B828C83F00FBF00010E0D80E031F2612590F00CE0FFE4C3CF13CF13A277
|
||||
:2003B200E0CF13CF13CFFE7D05BD45005023EF2408FBEE34F1FCED2408F582E434F0F5838E
|
||||
:1B03D200E0FA8B828C83F00FBF00010E0D80DA319190F0087404F031F261258B
|
||||
:0600C700E478FFF6D8FD0D
|
||||
:2000A5007900E94400601B7A009003F17800759300E493F2A308B800020593D9F4DAF27528
|
||||
:0200C50093FFA7
|
||||
:2000CD007800E84400600A79007593F0E4F309D8FC7808E84405600C790690F000E4F0A34D
|
||||
:0400ED00D8FCD9FA68
|
||||
:0D0098007581081203EDE582600302008E01
|
||||
:0403ED0075820022F3
|
||||
:00000001FF
|
||||
@@ -0,0 +1,134 @@
|
||||
; RF config is interleaved witht the interupt vectors to save space.
|
||||
; To select crystal frequency set 1 or 0
|
||||
CRYSTAL_26_MHZ=1
|
||||
; Remember to change in main.c also.
|
||||
;
|
||||
.globl __start__stack
|
||||
;--------------------------------------------------------
|
||||
; Stack segment in internal ram
|
||||
;--------------------------------------------------------
|
||||
.area SSEG (DATA)
|
||||
__start__stack:
|
||||
.ds 1
|
||||
|
||||
;--------------------------------------------------------
|
||||
; interrupt vector
|
||||
;--------------------------------------------------------
|
||||
.area VECTOR (CODE)
|
||||
.globl __interrupt_vect
|
||||
__interrupt_vect:
|
||||
ljmp __sdcc_gsinit_startup
|
||||
|
||||
jnb psw.1, 00001$ ; RFTXRX if F1=1 call bootload isr
|
||||
ljmp _rftxrx_isr ;
|
||||
.ds 2
|
||||
ljmp #(0x400+0x0B) ; ADC
|
||||
00001$:
|
||||
ljmp #(0x400+0x03) ; User code RFTXRX usr
|
||||
.ds 2
|
||||
ljmp #(0x400+0x13) ; URX0
|
||||
.db 0xD3 ; SYNC1
|
||||
.db 0x91 ; SYNC0
|
||||
.db 0xFF ; PKTLEN
|
||||
.db 0x05 ; PKTCTRL1
|
||||
.db 0x45 ; PKTCTRL0
|
||||
ljmp #(0x400+0x1B) ; URX1
|
||||
.db 0xFE ; ADDR
|
||||
.db 0x00 ; CHANNR
|
||||
.db 0x0C ; FSCTRL1
|
||||
.db 0x00 ; FSCTRL0
|
||||
.if CRYSTAL_26_MHZ
|
||||
.db 0x21 ; FREQ2
|
||||
.else
|
||||
.db 0x24 ; FREQ2
|
||||
.endif
|
||||
ljmp #(0x400+0x23) ; ENC
|
||||
.if CRYSTAL_26_MHZ
|
||||
.db 0x65 ; FREQ1
|
||||
.db 0x6A ; FREQ0
|
||||
.db 0x2D ; MDMCFG4
|
||||
.db 0x3B ; MDMCFG3
|
||||
.else
|
||||
.db 0x2D ; FREQ1
|
||||
.db 0xDD ; FREQ0
|
||||
.db 0x1D ; MDMCFG4
|
||||
.db 0x55 ; MDMCFG3
|
||||
.endif
|
||||
.db 0x13 ; MDMCFG2
|
||||
ljmp #(0x400+0x2B) ; ST
|
||||
.db 0x22 ; MDMCFG1
|
||||
.db 0xF8 ; MDMCFG0
|
||||
.db 0x62 ; DEVIATN
|
||||
.db 0x07 ; MCSM2
|
||||
.db 0x30 ; MCSM1
|
||||
ljmp #(0x400+0x33) ; P2INT
|
||||
.db 0x18 ; MCSM0
|
||||
.db 0x1D ; FOCCFG
|
||||
.db 0x1C ; BSCFG
|
||||
.db 0xC7 ; AGCCTRL2
|
||||
.db 0x00 ; AGCCTRL1
|
||||
ljmp #(0x400+0x3B) ; UTX0
|
||||
.db 0xB0 ; AGCCTRL0
|
||||
.db 0xB6 ; FREND1
|
||||
.db 0x10 ; FREND0
|
||||
.db 0xEA ; FSCAL3
|
||||
.db 0x2A ; FSCAL2
|
||||
ljmp #(0x400+0x43) ; DMA
|
||||
.db 0x00 ; FSCAL1
|
||||
.db 0x1F ; FSCAL0
|
||||
.ds 3
|
||||
ljmp #(0x400+0x4B) ; T1
|
||||
.ds 5
|
||||
ljmp #(0x400+0x53) ; T2
|
||||
.ds 5
|
||||
ljmp #(0x400+0x5B) ; T3
|
||||
.ds 5
|
||||
ljmp #(0x400+0x63) ; T4
|
||||
.ds 5
|
||||
ljmp #(0x400+0x6B) ; P0INT
|
||||
.ds 5
|
||||
ljmp #(0x400+0x73) ; UTX1
|
||||
.ds 5
|
||||
ljmp #(0x400+0x7B) ; P1INT
|
||||
.ds 5
|
||||
ljmp #(0x400+0x83) ; RF
|
||||
.ds 5
|
||||
ljmp #(0x400+0x8B) ; WDT
|
||||
|
||||
|
||||
;--------------------------------------------------------
|
||||
; external initialized ram data
|
||||
;--------------------------------------------------------
|
||||
.area XISEG (XDATA)
|
||||
.area HOME (CODE)
|
||||
.area GSINIT0 (CODE)
|
||||
.area GSINIT1 (CODE)
|
||||
.area GSINIT2 (CODE)
|
||||
.area GSINIT3 (CODE)
|
||||
.area GSINIT4 (CODE)
|
||||
.area GSINIT5 (CODE)
|
||||
.area GSINIT (CODE)
|
||||
.area GSFINAL (CODE)
|
||||
.area CSEG (CODE)
|
||||
|
||||
;--------------------------------------------------------
|
||||
; global & static initialisations
|
||||
;--------------------------------------------------------
|
||||
|
||||
.area GSINIT (CODE)
|
||||
.globl __sdcc_gsinit_startup
|
||||
.globl __sdcc_program_startup
|
||||
.globl __start__stack
|
||||
.globl __mcs51_genXINIT
|
||||
.globl __mcs51_genXRAMCLEAR
|
||||
.globl __mcs51_genRAMCLEAR
|
||||
.area GSFINAL (CODE)
|
||||
ljmp __sdcc_program_startup
|
||||
;--------------------------------------------------------
|
||||
; Home
|
||||
;--------------------------------------------------------
|
||||
.area HOME (CODE)
|
||||
.area HOME (CODE)
|
||||
__sdcc_program_startup:
|
||||
acall _bootloader_main
|
||||
; return from main will lock up
|
||||
Reference in new issue
Block a user