From 4e8a063f86d6634340f49fb96d0da08ea12f7274 Mon Sep 17 00:00:00 2001 From: Neo Anderson Date: Tue, 7 Apr 2020 08:27:46 -0700 Subject: [PATCH] Initial commit --- README.md | 11 +- SuperCIC – project sd2snes.pdf | Bin 0 -> 25359 bytes The weird and wonderful CIC.pdf | Bin 0 -> 94005 bytes dissassembly/3195a-dis.txt | 599 +++++++++++++++ dissassembly/3195a.txt | 64 ++ dissassembly/README.md | 55 ++ dissassembly/bitstreams/3195-0.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-1.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-10.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-11.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-12.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-13.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-14.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-15.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-2.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/3195-3.b | Bin 0 -> 131072 bytes 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dissassembly/bitstreams/6113-5.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/6113-6.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/6113-7.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/6113-8.b | Bin 0 -> 131072 bytes dissassembly/bitstreams/6113-9.b | Bin 0 -> 131072 bytes dissassembly/d411-dis.txt | 623 ++++++++++++++++ dissassembly/d411.txt | 64 ++ dissassembly/nescic-dis.txt | 632 ++++++++++++++++ dissassembly/nescic.txt | 64 ++ dissassembly/pinout.txt | 38 + supercic/supercic-key.asm | 754 +++++++++++++++++++ supercic/supercic-key.hex | 71 ++ supercic/supercic-lock.asm | 1134 +++++++++++++++++++++++++++++ supercic/supercic-lock.hex | 101 +++ 47 files changed, 4209 insertions(+), 1 deletion(-) create mode 100644 SuperCIC – project sd2snes.pdf create mode 100644 The weird and wonderful CIC.pdf create mode 100644 dissassembly/3195a-dis.txt create mode 100644 dissassembly/3195a.txt create mode 100644 dissassembly/README.md create mode 100644 dissassembly/bitstreams/3195-0.b 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create mode 100644 dissassembly/bitstreams/6113-12.b create mode 100644 dissassembly/bitstreams/6113-13.b create mode 100644 dissassembly/bitstreams/6113-14.b create mode 100644 dissassembly/bitstreams/6113-15.b create mode 100644 dissassembly/bitstreams/6113-2.b create mode 100644 dissassembly/bitstreams/6113-3.b create mode 100644 dissassembly/bitstreams/6113-4.b create mode 100644 dissassembly/bitstreams/6113-5.b create mode 100644 dissassembly/bitstreams/6113-6.b create mode 100644 dissassembly/bitstreams/6113-7.b create mode 100644 dissassembly/bitstreams/6113-8.b create mode 100644 dissassembly/bitstreams/6113-9.b create mode 100644 dissassembly/d411-dis.txt create mode 100644 dissassembly/d411.txt create mode 100644 dissassembly/nescic-dis.txt create mode 100644 dissassembly/nescic.txt create mode 100644 dissassembly/pinout.txt create mode 100644 supercic/supercic-key.asm create mode 100644 supercic/supercic-key.hex create mode 100644 supercic/supercic-lock.asm create mode 100644 supercic/supercic-lock.hex diff --git a/README.md b/README.md index f37dd45..8e17838 100644 --- a/README.md +++ b/README.md @@ -1,2 +1,11 @@ # SNES-CIC-Disassembly -Archives of the SNES CIC Disassembly process +Archives of the SNES CIC Disassembly process / SuperCIC creation + +The following can be found in this repo: + +| Source | Date | Repo Link | Retrieval Date | +| ------ | ---- | ---- | -------------- | +| [The weird and wonderful CIC Article](https://hackmii.com/2010/01/the-weird-and-wonderful-cic/) | 2010/01/17 | [PDF](/The weird and wonderful CIC.pdf) | 2020/04/07 | +| [Segher's Disassembly Folder](https://web.archive.org/web/20170102114815/http://segher.ircgeeks.net/cic-roms/) | 2017/01/02 | [Folder](/dissassembly) | 2020/04/07 | +| [SuperCIC - project sd2snes](https://sd2snes.de/blog/cool-stuff/supercic) | 2020/04/07 | [PDF](/SuperCIC – project sd2snes.pdf) | 2020/04/07| +| [SuperCIC source+hexfiles](http://sd2snes.de/files/supercic.zip) | 2019/03/29 | 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coma/nega swapped, +;; compared to the other chips! + + + + ;; RESET +000: 00 nop +040: 30 ldi 0 +060: 20 lbli 0 +070: 46 out +078: 55 in +07c: 67 ska 3 +07e: 87 t 007 +03f: 75 lbmi 1 + +05f: 55 in +06f: 66 ska 2 +077: e7 t 067 +07b: 21 lbli 1 +07d: 31 ldi 1 +03e: 70 ad +01f: 43 xd +04f: df t 05f + +067: 32 ldi 2 +073: 21 lbli 1 +079: 46 out +03c: 00 nop +05e: 30 ldi 0 +02f: 46 out +057: 3d ldi d + +06b: 01 adi 1 +075: eb t 06b +03a: 00 nop +01d: 00 nop +00e: b0 t 030 + +007: 31 ldi 1 +043: 21 lbli 1 +061: 46 out + +030: 7d 00 tml 200 + +06c: 31 ldi 1 + +076: 5c lxa + +03b: 74 lbmi 0 +05d: 7c c7 tml 147 +017: 75 lbmi 1 +04b: 7c c7 tml 147 +032: 7c f4 tml 174 +00c: 55 in +046: 65 ska 1 +023: a8 t 028 +051: 92 t 012 + +028: 30 ldi 0 +054: 41 x +06a: 46 out +035: 00 nop +01a: 55 in +00d: 47 out0 +006: 4a s +003: 75 lbmi 1 +041: 7c 83 tml 103 +050: 74 lbmi 0 +068: 60 skm 0 +074: e3 t 063 +07a: 7c f4 tml 174 +01e: 61 skm 1 +00f: 92 t 012 +047: db t 05b + +063: 7c f4 tml 174 +038: 61 skm 1 +05c: b7 t 037 +06e: 92 t 012 + +037: 00 nop + +05b: 5d xax +06d: 01 adi 1 +036: ca t 04a +01b: 7c 80 tml 100 +026: 7d de tml 35e +049: 27 lbli 7 +024: 40 l +052: 10 skai 0 +029: f6 t 076 +014: ec t 06c + +04a: 5d xax +025: bb t 03b + +012: 7c 83 tml 103 +004: 90 t 010 +042: 30 ldi 0 +021: b9 t 039 + +010: 21 lbli 1 +048: 30 ldi 0 + +064: 00 nop +072: e4 t 064 + +039: 21 lbli 1 +01c: 46 out +04e: 7c f3 tml 173 +053: 7c 80 tml 100 +034: 7c f3 tml 173 +02d: 92 t 012 + + + +;;{{{ +016: 00 nop +00b: 00 nop +045: 00 nop +022: 00 nop +011: 00 nop +008: 00 nop +044: 00 nop +062: 00 nop +031: 00 nop +018: 00 nop +04c: 00 nop +066: 00 nop +033: 00 nop +059: 00 nop +02c: 00 nop +056: 00 nop +02b: 00 nop +055: 00 nop +02a: 00 nop +015: 00 nop +00a: 00 nop +005: 00 nop +002: 00 nop +001: 00 nop + +07f: 80 t 000 +;;}}} + + + + ;; RUN HOST +100: 7c 83 tml 103 +160: ef t 16f +170: 31 ldi 1 +178: 21 lbli 1 +17c: 00 nop +17e: 00 nop +13f: 00 nop +15f: cf t 14f + +16f: 30 ldi 0 +177: 21 lbli 1 +17b: 46 out +17d: 00 nop +13e: 00 nop +11f: 00 nop + +14f: 46 out +167: 4c rit + + + + ;; WAIT A BIT + ;; P13 = 0, P12 = 0: 0.6s + ;; P13 = 0, P12 = 1: 0.4s + ;; P13 = 1, P12 = 0: 0.8s + ;; P13 = 1, P12 = 1: 1.0s +173: 21 lbli 1 +179: 55 in ; A := P1 +13c: 66 ska 2 +15e: 8e t 10e ; if A.2 { +12f: 67 ska 3 +157: ba t 13a ; if A.3 +16b: 35 ldi 5 ; A := 5 +175: d8 t 158 ; else + +13a: 32 ldi 2 ; A := 2 +11d: d8 t 158 + ; } else { + +10e: 67 ska 3 +107: b0 t 130 ; if A.3 +143: 34 ldi 4 ; A := 4 +161: d8 t 158 ; else + +130: 33 ldi 3 ; A := 3 + ; } + +158: 4a s ; [H:1] := A + + ;; WAIT 0.6 OR SO SECONDS +16c: 74 lbmi 0 ; H := 0 +176: 2b lbli b ; L := 0 + +13b: 30 ldi 0 +15d: 42 xi +12e: bb t 13b +117: 2f lbli f +14b: 38 ldi 8 + +165: 41 x +132: 2c lbli c +119: 49 sc + +10c: 30 ldi 0 +146: 73 adcsk +123: e5 t 165 +151: 42 xi +128: 8c t 10c + + ;; +154: 21 lbli 1 ; L := 1 +16a: 40 l ; H := [0:1] +135: 0f adi f +11a: 4c rit +10d: 4a s +106: ec t 16c + + + + ;; SKIP NEXT INSTRUCTION IF LOCK +103: 20 lbli 0 +141: 55 in +120: 67 ska 3 +150: 8f t 10f +168: 4d ritsk + + + + ;; H := "OTHER SIDE" +174: 74 lbmi 0 +17a: 7c 83 tml 103 +11e: 75 lbmi 1 +10f: 4c rit + + + + ;; [H:0] := NEXT STREAM BIT +147: 5d xax +163: 5c lxa +171: 57 xal +138: 40 l ; A := [H:X] +15c: 20 lbli 0 ; L := 0 +16e: 4a s +137: 69 rm 1 +15b: 6a rm 2 +16d: 6b rm 3 ; [H:0] := [H:X].0 +136: 4c rit + + + +;;{{{ +11b: 00 nop +14d: 00 nop +126: 00 nop +113: 00 nop +149: 00 nop +124: 00 nop +152: 00 nop +129: 00 nop +114: 00 nop +14a: 00 nop +125: 00 nop +112: 00 nop +109: 00 nop +104: 00 nop +142: 00 nop +121: 00 nop +110: 00 nop +148: 00 nop +164: 00 nop +172: 00 nop +139: 00 nop +11c: 00 nop +14e: 00 nop +127: 00 nop +153: 00 nop +169: 00 nop +134: 00 nop +15a: 00 nop +12d: 00 nop +116: 00 nop +10b: 00 nop +145: 00 nop +122: 00 nop +111: 00 nop +108: 00 nop +144: 00 nop +162: 00 nop +131: 00 nop +118: 00 nop +14c: 00 nop +166: 00 nop +133: 00 nop +159: 00 nop +12c: 00 nop +156: 00 nop +12b: 00 nop +155: 00 nop +12a: 00 nop +115: 00 nop +10a: 00 nop +105: 00 nop +102: 00 nop +101: 00 nop + +17f: 80 t 100 +;;}}} + + + + ;; INIT STREAM +200: 7c 83 tml 103 +260: 8e t 20e +270: 75 lbmi 1 +278: 21 lbli 1 +27c: 31 ldi 1 +27e: 63 skm 3 +23f: 30 ldi 0 +25f: 7d 80 tml 300 +277: 31 ldi 1 +27b: 60 skm 0 +27d: 30 ldi 0 +23e: 7d 80 tml 300 +24f: 31 ldi 1 +267: 61 skm 1 +273: 30 ldi 0 +279: 7d 80 tml 300 +25e: 31 ldi 1 +22f: 62 skm 2 +257: 30 ldi 0 +26b: 7d 80 tml 300 +23a: 00 nop +21d: b5 t 235 + +20e: 75 lbmi 1 +207: 21 lbli 1 +243: 3f ldi f +261: 41 x +230: 7d f7 tml 377 +26c: 65 ska 1 +276: 6b rm 3 +23b: 00 nop +25d: 7d f7 tml 377 +217: 65 ska 1 +24b: 68 rm 0 +265: 00 nop +232: 7d f7 tml 377 +20c: 65 ska 1 +246: 69 rm 1 +223: 00 nop +251: 7d f7 tml 377 +254: 65 ska 1 +26a: 6a rm 2 + +235: 74 lbmi 0 +21a: 21 lbli 1 +20d: 3e ldi e +206: 3f ldi f +203: 42 xi +241: 32 ldi 2 +220: 37 ldi 7 +250: 42 xi +268: 33 ldi 3 +274: 3b ldi b +27a: 42 xi +23d: 34 ldi 4 +21e: 3e ldi e +20f: 42 xi +247: 3f ldi f +263: 42 xi +271: 38 ldi 8 +238: 42 xi +25c: 32 ldi 2 +26e: 42 xi +237: 37 ldi 7 +25b: 42 xi +26d: 3d ldi d +236: 42 xi +21b: 37 ldi 7 +24d: 42 xi +226: 38 ldi 8 +213: 42 xi +249: 3e ldi e +224: 42 xi +252: 3e ldi e +229: 42 xi +214: 31 ldi 1 +24a: 42 xi +225: 35 ldi 5 +212: 41 x +209: 75 lbmi 1 +204: 22 lbli 2 +242: 35 ldi 5 +221: 37 ldi 7 +210: 42 xi +248: 3e ldi e +264: 3b ldi b +272: 42 xi +239: 35 ldi 5 +21c: 3d ldi d +24e: 42 xi +227: 31 ldi 1 +253: 42 xi +269: 32 ldi 2 +234: 42 xi +25a: 31 ldi 1 +22d: 42 xi +216: 37 ldi 7 +20b: 42 xi +245: 3e ldi e +222: 42 xi +211: 36 ldi 6 +208: 42 xi +244: 37 ldi 7 +262: 42 xi +231: 3a ldi a +218: 42 xi +24c: 37 ldi 7 +266: 42 xi +233: 31 ldi 1 +259: 42 xi +22c: 35 ldi 5 +256: 41 x +22b: 4c rit + + + +;;{{{ +255: 00 nop +22a: 00 nop +215: 00 nop +20a: 00 nop +205: 00 nop +202: 00 nop +201: 00 nop + +27f: 80 t 200 +;;}}} + + + + ;; OUTPUT STREAM ID BIT +300: 20 lbli 0 +340: 4a s +360: 30 ldi 0 +370: 41 x +378: 46 out +37c: 00 nop +37e: 00 nop +33f: 47 out0 +35f: 21 lbli 1 +36f: 4c rit + + + + ;; INPUT STREAM ID BIT +377: 20 lbli 0 +37b: 00 nop +37d: 00 nop +33e: 00 nop +31f: 00 nop +34f: 00 nop +367: 55 in +373: 00 nop +379: 21 lbli 1 +33c: 4c rit + + + + ;; MANGLE BOTH +35e: 74 lbmi 0 +32f: 7d f5 tml 375 +36b: 75 lbmi 1 + + + + ;; MANGLE ONE +375: 2f lbli f +33a: 40 l + +31d: 5c lxa +30e: 49 sc +307: 21 lbli 1 +343: 72 adc +361: 4a s +330: 52 li +358: 72 adc +36c: 44 coma +376: 42 xi +33b: 73 adcsk +35d: 42 xi +32e: 70 ad +317: 4a s +34b: 52 li +365: 48 rc +332: 72 adc +319: 42 xi +30c: 08 adi 8 +346: 72 adc +323: 42 xi + +351: 01 adi 1 +328: 00 nop +354: 72 adc +36a: 4a s +335: 52 li +31a: d1 t 351 +30d: 5d xax +306: 0f adi f +303: 4c rit +341: 9d t 31d + + + +;;{{{ +320: 00 nop +350: 00 nop +368: 00 nop +374: 00 nop +37a: 00 nop +33d: 00 nop +31e: 00 nop +30f: 00 nop +347: 00 nop +363: 00 nop +371: 00 nop +338: 00 nop +35c: 00 nop +36e: 00 nop +337: 00 nop +35b: 00 nop +36d: 00 nop +336: 00 nop +31b: 00 nop +34d: 00 nop +326: 00 nop +313: 00 nop +349: 00 nop +324: 00 nop +352: 00 nop +329: 00 nop +314: 00 nop +34a: 00 nop +325: 00 nop +312: 00 nop +309: 00 nop +304: 00 nop +342: 00 nop +321: 00 nop +310: 00 nop +348: 00 nop +364: 00 nop +372: 00 nop +339: 00 nop +31c: 00 nop +34e: 00 nop +327: 00 nop +353: 00 nop +369: 00 nop +334: 00 nop +35a: 00 nop +32d: 00 nop +316: 00 nop +30b: 00 nop +345: 00 nop +322: 00 nop +311: 00 nop +308: 00 nop +344: 00 nop +362: 00 nop +331: 00 nop +318: 00 nop +34c: 00 nop +366: 00 nop +333: 00 nop +359: 00 nop +32c: 00 nop +356: 00 nop +32b: 00 nop +355: 00 nop +32a: 00 nop +315: 00 nop +30a: 00 nop +305: 00 nop +302: 00 nop +301: 00 nop + +37f: 80 t 300 +;;}}} + +;; vi:fdm=marker:cms=;;%s:fdo=: diff --git a/dissassembly/3195a.txt b/dissassembly/3195a.txt new file mode 100644 index 0000000..701f5cd --- /dev/null +++ b/dissassembly/3195a.txt @@ -0,0 +1,64 @@ +0010011000100100001001000010000000000000000000100010010000110001 +1000000000100000101000100010000010000010100000101000001000100000 +0100000001100010000010001000100010001000000000001010101011000000 +0000000001000000010001000000010000000000011000000100010000000000 +0000010000110100000100000010000001000100011001000011010000000000 +0000100001000000100100001001000001011000010100001001110000001000 +1001000100001000000100001000000000010000000000011001100000000000 +0001000000100011000000010010000000000010000100100110001100000000 +1101001010101000100000101110100000100010111100110100101000100010 +0001000000010001010000000101000000000000000100000100000100000000 +0100000101000101010000010101000100010100000000010001010000010000 +0010000000000010000100000000000000010010001100100001001000000000 +0001000000000000000000000000000000000000000100000000000000000000 +0000000000000100010000000100000000000100010001000000010000000000 +0001001000110000000100000000000000010000000000000011000000000000 +0111000101100100001000000010000001010100010100000000010100100000 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+0000001000000101000000100000000000100010001000100000010100000000 +0100010100010110001101000110000001100110011001100011000101000000 +0100011001000111000011010000100100101100001111000000100001000011 diff --git a/dissassembly/README.md b/dissassembly/README.md new file mode 100644 index 0000000..4ab0a20 --- /dev/null +++ b/dissassembly/README.md @@ -0,0 +1,55 @@ +# SNES-CIC-Disassembly/disassembly + +### This folder contains annotated source by Segher + +#### Original `bitstreams` can be found in the [bitstreams](./bitstreams/) directory + +| Source File | Annotated Disassembly | +| ----------- | --------------------- | +| [3195a.txt](3195a.txt) | [3195a-dis.txt](3195a-dis.txt) | +| [d411.txt](d411.txt) | [d411-dis.txt](d411-dis.txt) | +| [nescic.txt](nescic.txt) | [nescic-dis.txt](nescic-dis.txt) | + + +### pinout.txt + +``` + NES CIC: + +------------------+ + DATA_OUT <-- | 1 P0.0 +5V 16 | + DATA_IN --> | 2 P0.1 P3.2 15 | ? + SEED --> | 3 P0.2 P3.1 14 | ? +LOCK/-KEY --> | 4 P0.3 P3.0 13 | ? + | 5 Xout P1.3 12 | <-- RESET_SPEED_B + | 6 Xin P1.2 11 | <-- RESET_SPEED_A + | 7 RESET P1.1 10 | --> SLAVE_CIC_RESET + | 8 GND P1.0 9 | --> -HOST_RESET + +------------------+ + + + SNES CIC: + +------------------+ + DATA_OUT <-- | 1 P0.0 +5V 16 | + DATA_IN --> | 2 P0.1 P3.2 15 | ? + SEED --> | 3 P0.2 P3.1 14 | ? +LOCK/-KEY --> | 4 P0.3 P3.0 13 | ? + | 5 Xout P1.3 12 | ? + | 6 Xin P1.2 11 | ? + | 7 RESET P1.1 10 | --> SLAVE_CIC_RESET + | 8 GND P1.0 9 | --> -HOST_RESET + +------------------+ + + + SNES PIF: + +------------------+ + DATA_OUT <-- | 1 P0.0 +5V 18 | + DATA_IN --> | 2 P0.1 P3.2 17 | ? + SEED --> | 3 P0.2 P3.1 16 | ? +LOCK/-KEY --> | 4 P0.3 P3.0 15 | <-- ? + | 5 N/C N/C 14 | + | 6 Xout P1.3 13 | ? + | 7 Xin P1.2 12 | --> ? + | 8 RESET P1.1 11 | --> SLAVE_CIC_RESET + | 9 GND P1.0 10 | --> -PPU2_RESET + +------------------+ +``` \ No newline at end of file diff --git a/dissassembly/bitstreams/3195-0.b b/dissassembly/bitstreams/3195-0.b new file mode 100644 index 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t 02e ; goto 270 // init stream + + + + ;; KEY START +076: 31 ldi 1 +03b: 21 lbli 1 +05d: 46 out ; P1 := 1 + +02e: 79 70 tl 270 ; goto 270 // init stream + + + + ;; DIE +04b: 20 lbli 0 +065: 55 in ; A := P0 +032: 67 ska 3 +019: d4 t 054 ; if A.3 { // we are lock +00c: 75 lbmi 1 +046: 21 lbli 1 +023: 34 ldi 4 +051: 4a s ; [1:1] := 4 +028: c1 t 041 ; goto 041 + ; } else { // we are key + +054: 33 ldi 3 +06a: 20 lbli 0 +035: 46 out ; P0 := 3 +01a: 21 lbli 1 +00d: 31 ldi 1 +006: 46 out ; P1 := 1 +003: cb t 04b ; goto 04b // loop + ; } + + + + ;; +041: 33 ldi 3 +020: 20 lbli 0 +050: 46 out ; P0 := 3 +068: 75 lbmi 1 +074: 21 lbli 1 +07a: 30 ldi 0 +03d: 62 skm 2 +01e: 34 ldi 4 ; A := ([1.1].2 ? 0 : 4) +00f: 4a s ; [1.1] = A +047: 46 out ; P1 := A + + ;; WAIT ABOUT ONE SECOND +063: 74 lbmi 0 +071: 2b lbli b + +038: 30 ldi 0 +05c: 42 xi +06e: b8 t 038 +037: 2e lbli e +05b: 38 ldi 8 +06d: 42 xi +036: 3d ldi d + +01b: 41 x +04d: 2b lbli b +026: 48 sc + +013: 30 ldi 0 +049: 73 adcsk +024: 9b t 01b +052: 42 xi +029: 93 t 013 +014: c1 t 041 ; goto 041 // loop + + + + ;; RUN HOST +04a: 7d fa tml 37a +012: a1 t 021 ; if lock +009: 35 ldi 5 ; A := 5 +004: 21 lbli 1 +042: e4 t 064 ; else + +021: 30 ldi 0 ; A := 0 +010: 21 lbli 1 +048: 46 out + +064: 00 nop +072: 00 nop +039: 00 nop +01c: 46 out ; P1 := A +04e: 4c rit + + + + ;; WAIT A BIT + ;; 626 cycles, about 0.6ms +027: 30 ldi 0 + +053: 5d xax +069: 30 ldi 0 + +034: 01 adi 1 +05a: b4 t 034 +02d: 5d xax +016: 01 adi 1 +00b: d3 t 053 +045: 4c rit + + + +;;{{{ +022: 00 nop +011: 00 nop +008: 00 nop +044: 00 nop +062: 00 nop +031: 00 nop +018: 00 nop +04c: 00 nop +066: 00 nop +033: 00 nop +059: 00 nop +02c: 00 nop +056: 00 nop +02b: 00 nop +055: 00 nop +02a: 00 nop +015: 00 nop +00a: 00 nop +005: 00 nop +002: 78 80 tl 100 + +07f: 80 t 000 +;;}}} + + + + ;; DIE +100: 00 nop +140: 30 ldi 0 +160: 21 lbli 1 +170: 46 out +178: 80 t 100 + + + +17c: fc t 17c + + + + ;; MAIN LOOP +17e: 31 ldi 1 + +13f: 5c lxa + +15f: 74 lbmi 0 +16f: 7d cb tml 34b +17b: 75 lbmi 1 +17d: 7d cb tml 34b +11f: 7c b1 tml 131 +167: 55 in +173: 64 ska 0 +179: de t 15e +13c: d7 t 157 + +15e: 65 ska 1 +12f: dd t 15d + + + + ;; +157: 78 4b tl 04b + + + + ;; +175: 60 skm 0 +13a: b0 t 130 +11d: 7c d9 tml 159 +107: 61 skm 1 +143: d7 t 157 +161: bd t 13d + +130: 7c d9 tml 159 +16c: 61 skm 1 +176: fa t 17a +13b: d7 t 157 + +15d: 30 ldi 0 +12e: 41 x +117: 46 out +14b: 00 nop +165: 55 in +132: 47 out0 +119: 4a s +10c: 23 lbli 3 +146: 55 in +123: 20 lbli 0 +151: 64 ska 0 +128: f5 t 175 +154: 61 skm 1 +16a: c1 t 141 +135: 7c d9 tml 159 +10d: 60 skm 0 +106: d7 t 157 +103: bd t 13d + +141: 7c d9 tml 159 +150: 60 skm 0 +168: fa t 17a +174: d7 t 157 + +17a: 00 nop + +13d: 5d xax +11e: 01 adi 1 +10f: a1 t 121 +147: 7c 4a tml 04a +171: 7d f0 tml 370 +15c: 7d f0 tml 370 +137: 7d f0 tml 370 +16d: 27 lbli 7 +136: 40 l +11b: 23 lbli 3 +14d: 41 x +126: 5c lxa +113: 55 in +149: 41 x +124: 6c sm 0 +152: 64 ska 0 +129: 68 rm 0 +114: 5d xax +14a: 41 x +125: 46 out +112: 5d xax +109: 10 skai 0 +104: bf t 13f +142: fe t 17e + +121: 5d xax +110: df t 15f + + + + ;; OUTPUT STREAM ID BIT +148: 20 lbli 0 +164: 4a s +172: 30 ldi 0 +139: 41 x +11c: 46 out +14e: 00 nop +127: 00 nop +153: 47 out0 +169: 21 lbli 1 +134: 4c rit + + + + ;; INPUT STREAM ID BIT +15a: 20 lbli 0 +12d: 00 nop +116: 00 nop +10b: 00 nop +145: 00 nop +122: 00 nop +111: 00 nop +108: 55 in +144: 21 lbli 1 +162: 4c rit + + + + ;; H := "OTHER SIDE" +131: 74 lbmi 0 +118: 7d fa tml 37a +166: 75 lbmi 1 +133: 4c rit + + + + ;; H := "THIS SIDE" +159: 75 lbmi 1 +12c: 7d fa tml 37a +12b: 74 lbmi 0 +155: 4c rit + + + +;;{{{ +12a: 00 nop +115: 00 nop +10a: 00 nop +105: 00 nop +102: 80 t 100 +101: 80 t 100 + +17f: 80 t 100 +;;}}} + + + + ;; +200: 00 nop +240: 78 80 tl 100 + + + + ;; INIT STREAM +270: 7d fa tml 37a +27c: e1 t 261 +27e: 75 lbmi 1 +23f: 21 lbli 1 +25f: 31 ldi 1 +26f: 63 skm 3 +277: 30 ldi 0 +27b: 7c c8 tml 148 +23e: 31 ldi 1 +21f: 60 skm 0 +24f: 30 ldi 0 +267: 7c c8 tml 148 +279: 31 ldi 1 +23c: 61 skm 1 +25e: 30 ldi 0 +22f: 7c c8 tml 148 +26b: 31 ldi 1 +275: 62 skm 2 +23a: 30 ldi 0 +21d: 7c c8 tml 148 +207: 00 nop +243: 83 t 203 + +261: 75 lbmi 1 +230: 21 lbli 1 +258: 3f ldi f +26c: 41 x +276: 7c da tml 15a +25d: 65 ska 1 +22e: 6b rm 3 +217: 00 nop +24b: 7c da tml 15a +232: 65 ska 1 +219: 68 rm 0 +20c: 00 nop +246: 7c da tml 15a +251: 65 ska 1 +228: 69 rm 1 +254: 00 nop +26a: 7c da tml 15a +21a: 65 ska 1 +20d: 6a rm 2 +206: 00 nop + +203: 74 lbmi 0 +241: 21 lbli 1 +220: 3b ldi b +250: 42 xi +268: 31 ldi 1 +274: 42 xi +27a: 34 ldi 4 +23d: 42 xi +21e: 3f ldi f +20f: 42 xi +247: 34 ldi 4 +263: 42 xi +271: 36 ldi 6 +238: 3b ldi b +25c: 42 xi +26e: 35 ldi 5 +237: 42 xi +25b: 38 ldi 8 +26d: 37 ldi 7 +236: 42 xi +21b: 3f ldi f +24d: 42 xi +226: 3a ldi a +213: 3d ldi d +249: 42 xi +224: 36 ldi 6 +252: 42 xi +229: 3c ldi c +214: 31 ldi 1 +24a: 42 xi +225: 3e ldi e +212: 42 xi +209: 39 ldi 9 +204: 42 xi +242: 38 ldi 8 +221: 41 x +210: 75 lbmi 1 +248: 22 lbli 2 +264: 39 ldi 9 +272: 42 xi +239: 3a ldi a +21c: 42 xi +24e: 31 ldi 1 +227: 42 xi +253: 38 ldi 8 +269: 42 xi +234: 35 ldi 5 +25a: 42 xi +22d: 37 ldi 7 +216: 3f ldi f +20b: 42 xi +245: 31 ldi 1 +222: 42 xi +211: 39 ldi 9 +208: 31 ldi 1 +244: 42 xi +262: 3e ldi e +231: 42 xi +218: 3b ldi b +24c: 31 ldi 1 +266: 42 xi +233: 30 ldi 0 +259: 42 xi +22c: 3d ldi d +256: 42 xi +22b: 3e ldi e +255: 42 xi +22a: 3c ldi c +215: 41 x +20a: 78 fe tl 17e + + + + +202: 78 80 tl 100 + +27f: 80 t 200 + + + +300: 00 nop +340: 78 80 tl 100 + + + + ;; MANGLE BOTH +370: 74 lbmi 0 +378: 7d bf tml 33f +37e: 75 lbmi 1 + + + + ;; MANGLE ONE +33f: 2f lbli f +35f: 40 l + +36f: 5c lxa +377: 48 sc +37b: 21 lbli 1 +37d: 72 adc +33e: 4a s +31f: 52 li +34f: 72 adc +367: 54 coma +373: 42 xi +379: 73 adcsk +33c: 42 xi +35e: 70 ad +32f: 4a s +357: 52 li +36b: 49 rc +375: 72 adc +33a: 42 xi +31d: 08 adi 8 +30e: 72 adc +307: 42 xi + +343: 01 adi 1 +361: 00 nop +330: 72 adc +358: 4a s +36c: 52 li +376: c3 t 343 +33b: 5d xax +35d: 0f adi f +32e: 4c rit +317: ef t 36f + + + + ;; [H:0] := NEXT STREAM BIT +34b: 5d xax +365: 5c lxa +332: 57 xal +319: 40 l +30c: 20 lbli 0 +346: 4a s +323: 37 ldi 7 +351: 60 skm 0 +328: 30 ldi 0 +354: 4a s ; [H:0] := [H:L].0 ? 7 : 0 +36a: 23 lbli 3 +335: 55 in ; A := P3 +31a: 20 lbli 0 ; L := 0 +30d: 64 ska 0 +306: d0 t 350 ; if P3.0.= 1 +303: 69 rm 1 ; [H:0] &= 5 +341: 00 nop +320: 4c rit ; else + +350: 68 rm 0 +368: 6a rm 2 ; [H:0] &= 2 +374: 4c rit + + + + ;; SKIP NEXT INSTRUCTION IF LOCK +37a: 20 lbli 0 +33d: 55 in +31e: 67 ska 3 +30f: f4 t 374 +347: 4d ritsk + + + +;;{{{ +363: 00 nop +371: 00 nop +338: 00 nop +35c: 00 nop +36e: 00 nop +337: 00 nop +35b: 00 nop +36d: 00 nop +336: 00 nop +31b: 00 nop +34d: 00 nop +326: 00 nop +313: 00 nop +349: 00 nop +324: 00 nop +352: 00 nop +329: 00 nop +314: 00 nop +34a: 00 nop +325: 00 nop +312: 00 nop +309: 00 nop +304: 00 nop +342: 00 nop +321: 00 nop +310: 00 nop +348: 00 nop +364: 00 nop +372: 00 nop +339: 00 nop +31c: 00 nop +34e: 00 nop +327: 00 nop +353: 00 nop +369: 00 nop +334: 00 nop +35a: 00 nop +32d: 00 nop +316: 00 nop +30b: 00 nop +345: 00 nop +322: 00 nop +311: 00 nop +308: 00 nop +344: 00 nop +362: 00 nop +331: 00 nop +318: 00 nop +34c: 00 nop +366: 00 nop +333: 00 nop +359: 00 nop +32c: 00 nop +356: 00 nop +32b: 00 nop +355: 00 nop +32a: 00 nop +315: 00 nop +30a: 00 nop +305: 00 nop +302: 78 80 tl 100 + +37f: 80 t 300 +;;}}} + +;; vi:fdm=marker:cms=;;%s:fdo=: diff --git a/dissassembly/d411.txt b/dissassembly/d411.txt new file mode 100644 index 0000000..09b11d0 --- /dev/null +++ b/dissassembly/d411.txt @@ -0,0 +1,64 @@ +0000010000001100111001001100010011101000101001001110101000010001 +1111100101001100001010010100010000010011001110110110111101000000 +0101011000000011110101101101101011110101101100011101010100000000 +0110000111000101111100010011000101110001001100011111010001010001 +1101010111000000010101000000010001110100101100010111010001100000 +1000000000000100000000001000000011000000011010011000010011000000 +0110000110010001001100001001000000110001001000011111100100010000 +1010000100000010100000011010001111100001110000011110001101110000 +0101100010011010110010000111100101100010011010001111101100011000 +0000000100110001000000000011000000110000001100000111000100110001 +0000010000000001011001000110000001000101010100010111010100000000 +1011000000010010110100011100001110010000001000001111001100010000 +1010000000100001111100000100000010000000000100001111000100000000 +1100010001000100111001001000000010010100001100001110010000000000 +0001000000000000011100000001000001010000011100100111001000000000 +1000000010010100110100011100001011000101011001111111011110000000 +1111000000000110010110010101010101111011101110100101111111101000 +1100000000001000000001001000010010011000000110001101110010010000 +0011000000010000000110000000000000000000100110001010100000000000 +1101000010100001010000000110000001100001111110000111000100100000 +0001001100010000010000100001001101000010010000000101001100000000 +0011000100000001000000000000000000000000000000010011000000010000 +0011000000000000000000000100000010000000010100000110000000000000 +1100000000010001110000000001000111010100011101011101000101010000 +1001001000001000001100110010001000110001101000001011101100000000 +1011000010000010111100000100001011111000000100001111101010001000 +0001000001000000010100010000000100010001000000000101000100000000 +1010000010010000110000001101000010000000111000000101000010000000 +1010111000110100101001001001100010100100110011000011100010100000 +0000000000100000001100000011100000101000001010000011100010100000 +0101000000000000011100000111000001110000001100000110000010011000 +0101000000000000000001000100011001100010001100100100011001000001 +0010011001000000011000000000000010100010100011101110100000010001 +0100110100101000100010010000100011101111111111110000000100000000 +0001001001100100001010100000100100001000010110100110111100000001 +0100010110111010110100000100000001000000010001011111111101000001 +1101100000001100000110010010111100111111011110111001010100000100 +1000100001000010011010010000000000110101101111010100101000100000 +0000000100010110100100000001110010010101000011011001101010010000 +0001111000011111000000100000111101001111010111110000000100000001 +0000000001110100011100000100001010010001110100011011011000010010 +1101100000001110010010010100100101011001010110010000011100000000 +0000100001000111010000000000010000010100000100010100111100000100 +1111110000100001000001000000000000101100001111001000000110000000 +0010100000010000001110000010101110101110100111100011000100000001 +1100010001101011010001000000000000000000110001000110111110000000 +0001101000110101000000110011100000001001000110110010011000000000 +1100110100100010001010010000000100011001110111010110101101000000 +0111000110111001000101001000010000000110010101111011110100000000 +0100011100000100101000011111110011010011110101111110110000011000 +1110010100111111010001010110100011000101101011010101101000000000 +1000011100010000100101000001010010000110100101101000000100010000 +1000000110001100000001100000011010000111001001111000101010000000 +0010000000000010001001010010110100101101001111010010101100000000 +1110100001100011100001000000110011111100101111000010001101000000 +0101110100100010001100000000010000011001000111110111010001000000 +1001000010100100101100110000000101010011110000110011010100000000 +0010000010000101100000100100011000000110001001101100001100000000 +0001001001001101001111000110110101011111010011100111100101001001 +1100000101001110000001000100000101000101100001010000101001000000 +1000001010000111011110001010010001111100011110001001110110000110 +0000000000000101001000011000101110001011101010111010110000100000 +0011011100100000000000010000000001100001011000110000010110001000 +0001010000010100001100000010011000100110011101100010001000000001 diff --git a/dissassembly/nescic-dis.txt b/dissassembly/nescic-dis.txt new file mode 100644 index 0000000..0ce2e8b --- /dev/null +++ b/dissassembly/nescic-dis.txt @@ -0,0 +1,632 @@ + ;; RESET +000: 30 ldi 0 +040: 20 lbli 0 +060: 4a s ; [H:0] := 0 + +070: 30 ldi 0 +078: 46 out ; P0 := 0 +07c: 55 in ; A := P0 +07e: 67 ska 3 ; if A.3 = 0 // we are key +03f: f6 t 076 ; goto 076 + + + + ;; LOCK START +05f: 75 lbmi 1 ; H := 1 + + ; forever { +06f: 55 in ; A := P0 +077: 66 ska 2 ; if A.2 = 0 +07b: f3 t 073 ; last +07d: 21 lbli 1 +03e: 31 ldi 1 +01f: 70 ad +04f: 43 xd ; [1:1]++ +067: ef t 06f ; } + +073: 30 ldi 0 +079: 20 lbli 0 +03c: 4a s ; [1:0] := 0 +05e: 32 ldi 2 +02f: 21 lbli 1 +057: 46 out ; P1 := 2 // reset host and key +06b: 00 nop +075: 30 ldi 0 +03a: 46 out ; P1 := 0 // run key +01d: 20 lbli 0 ; L := 0 +00e: 31 ldi 1 +007: 46 out ; P0 = 1 +043: 3e ldi e ; A := e + + ; while A <> 0 { +061: 01 adi 1 ; A++ +030: e1 t 061 ; } +058: 00 nop +06c: ae t 02e ; goto 02e + + + + ;; KEY START + ; (L = 0, A = P0) +076: 65 ska 1 ; if A.1 = 0 // if not test mode +03b: 8c t 00c ; goto 00c +05d: 00 nop + + + + ;; INIT LOCK, OR KEY IN TEST MODE + ; (L = 0) +02e: 47 out0 ; P0 := 0 +017: 7d 00 tml 200 ; call 200 // init stream +065: 7d a0 tml 320 ; call 320 // magic +019: d1 t 051 ; goto 051 + + + + ;; INIT KEY IN NORMAL MODE +00c: 47 out0 ; P0 := 0 +046: 7d 00 tml 200 ; call 200 // init stream + + + + ;; MAIN LOOP +051: 31 ldi 1 ; A := 1 + +028: 5c lxa ; X := A + +054: 74 lbmi 0 ; H := 0 +06a: 7c c7 tml 147 ; call 147 // [H:0] := next stream bit + +01a: 75 lbmi 1 ; H := 1 +00d: 7c c7 tml 147 ; call 147 // [H:0] := next stream bit + +003: 7c f4 tml 174 ; H := "other side" +020: 55 in ; A := P0 +050: 67 ska 3 ; if A.3 = 0 // if key +068: a7 t 027 ; goto 027 + +074: 30 ldi 0 +07a: 41 x +03d: 46 out ; P0 := [0:0] +01e: 00 nop +00f: 55 in ; A := P0 +047: 47 out0 ; P0 := 0 +063: 4a s ; [0:0] := A +071: 75 lbmi 1 +038: 7c 83 tml 103 +06e: 74 lbmi 0 +037: 60 skm 0 +05b: 93 t 013 ; if [1:0].0 = 1 { +06d: 7c f4 tml 174 ; H := "other side" +01b: 61 skm 1 ' if [H:0].1 = 0 +04d: b3 t 033 ; goto 033 // die +026: ca t 04a + ; } else { + +013: 7c f4 tml 174 ; H := "other side" +024: 61 skm 1 ; if [H:0].1 = 1 +052: 94 t 014 +029: b3 t 033 ; goto 033 // die + +014: 00 nop + ; } + ; goto 04a + + + + ;; +04a: 5d xax +025: 01 adi 1 ; A := X + 1 +012: 9c t 01c ; if A = 0 { +009: 7c af tml 12f ; call 12f // run host +042: 7d de tml 35e ; call 35e // mangle both +010: 27 lbli 7 ; L := 7 +048: 40 l ; A := [H:7] +064: 10 skai 0 ; if [H:7] <> 0 +072: a8 t 028 ; goto 028 + ; else +039: d1 t 051 ; goto 051 + ; } + +01c: 5d xax ; X := A +04e: d4 t 054 ; goto 054 + + + + ;; +027: 30 ldi 0 +053: 41 x +069: 46 out ; P0 := [1:0] +034: 55 in ; A := P0 +05a: 00 nop +02d: 47 out0 ; P0 := 0 +016: 4a s ; [1:0] := A +00b: 75 lbmi 1 +045: 7c 83 tml 103 +011: 74 lbmi 0 ; H := 0 +008: 60 skm 0 +044: 93 t 013 +062: 7c f4 tml 174 ; H := 1 +018: 61 skm 1 +04c: b3 t 033 // die +066: ca t 04a + + + + ;; DIE +033: 78 80 tl 100 ; goto 100 // die + + + +;;{{{ +02c: 00 nop +056: 00 nop +02b: 00 nop +055: 00 nop +02a: 00 nop +015: 00 nop +00a: 00 nop +005: 00 nop +002: 00 nop +001: 00 nop + +07f: 80 t 000 +;;}}} + + + + ;; DIE +100: 7c 83 tml 103 +160: fc t 17c +170: 30 ldi 0 +178: fd t 17d ; if key { + +17c: 21 lbli 1 +17e: 31 ldi 1 +13f: 46 out ' P1 = 1 +15f: 20 lbli 0 +16f: 33 ldi 3 + + ; forever +177: 46 out ; P0 = 3 +17b: f7 t 177 + ; } + +17d: 21 lbli 1 +13e: 46 out ; P1 := 0 // reset host +11f: 7c 97 tml 117 ; call 117 // wait one second +167: 7c af tml 12f ; call 12f // run host +179: 7c 97 tml 117 ; call 117 // wait one second +15e: 80 t 100 ; goto 100 + + + + ;; RUN HOST +12f: 7c 83 tml 103 +16b: e1 t 161 ; if lock { +175: 31 ldi 1 ; A := 1 // pull host reset high +13a: 21 lbli 1 +11d: 00 nop +10e: 00 nop +107: 00 nop +143: dd t 15d ; } else { + +161: 30 ldi 0 ; A := 0 +130: 21 lbli 1 +158: 46 out ; P1 := 0 +16c: 00 nop +176: 00 nop +13b: 00 nop + ; } + +15d: 46 out ; P1 := A +12e: 4c rit + + + + ;; WAIT ONE SECOND +117: 74 lbmi 0 +14b: 2b lbli b + +165: 30 ldi 0 +132: 42 xi +119: e5 t 165 +10c: 2f lbli f +146: 3e ldi e + +123: 41 x +151: 2b lbli b +128: 48 sc + +154: 30 ldi 0 +16a: 73 adcsk +135: a3 t 123 +11a: 42 xi +10d: d4 t 154 +106: 4c rit + + + + ;; SKIP NEXT INSTRUCTION IF LOCK +103: 20 lbli 0 ; L := 0 +141: 55 in ; A := P0 +120: 67 ska 3 ; if P0.0 = 0 // if key +150: 8f t 10f ; return + ; else +168: 4d ritsk ; return and skip + + + + ;; H := "OTHER SIDE" +174: 74 lbmi 0 ; H := 0 +17a: 7c 83 tml 103 ; skip if lock: +11e: 75 lbmi 1 ; H := 1 +10f: 4c rit + + + + ;; [H:0] := NEXT STREAM BIT +147: 5d xax +163: 5c lxa +171: 57 xal +138: 40 l +15c: 20 lbli 0 +16e: 64 ska 0 +137: 9b t 11b ; if [H:X].0 = 1 { +15b: 35 ldi 5 +16d: 4a s ; [H:0] := 5 +136: 4c rit ; return + ; } else { + +11b: 30 ldi 0 +14d: 4a s ; [H:0] := 0 +126: 4c rit ; return + ; } + + + +;;{{{ +113: 00 nop +149: 00 nop +124: 00 nop +152: 00 nop +129: 00 nop +114: 00 nop +14a: 00 nop +125: 00 nop +112: 00 nop +109: 00 nop +104: 00 nop +142: 00 nop +121: 00 nop +110: 00 nop +148: 00 nop +164: 00 nop +172: 00 nop +139: 00 nop +11c: 00 nop +14e: 00 nop +127: 00 nop +153: 00 nop +169: 00 nop +134: 00 nop +15a: 00 nop +12d: 00 nop +116: 00 nop +10b: 00 nop +145: 00 nop +122: 00 nop +111: 00 nop +108: 00 nop +144: 00 nop +162: 00 nop +131: 00 nop +118: 00 nop +14c: 00 nop +166: 00 nop +133: 00 nop +159: 00 nop +12c: 00 nop +156: 00 nop +12b: 00 nop +155: 00 nop +12a: 00 nop +115: 00 nop +10a: 00 nop +105: 00 nop +102: 00 nop +101: 00 nop + +17f: 80 t 100 +;;}}} + + + + ;; INIT STREAM +200: 7c 83 tml 103 +260: 8e t 20e ; if lock { +270: 75 lbmi 1 +278: 21 lbli 1 +27c: 31 ldi 1 +27e: 63 skm 3 +23f: 30 ldi 0 ; A := [1:1].3 +25f: 7d 80 tml 300 ; call 300 // output stream id bit +277: 31 ldi 1 +27b: 60 skm 0 +27d: 30 ldi 0 ; A := [1:1].0 +23e: 7d 80 tml 300 ; call 300 // output stream id bit +24f: 31 ldi 1 +267: 61 skm 1 +273: 30 ldi 0 ; A := [1:1].1 +279: 7d 80 tml 300 ; call 300 // output stream id bit +25e: 31 ldi 1 +22f: 62 skm 2 +257: 30 ldi 0 ; A := [1:1].2 +26b: 7d 80 tml 300 ; call 300 // output stream id bit +23a: 00 nop +21d: b5 t 235 ; } else { + +20e: 75 lbmi 1 ; H := 1 +207: 21 lbli 1 ; L := 1 +243: 3f ldi f +261: 41 x ; [1:1] := f +230: 7d f7 tml 377 ; call 377 // input stream id bit +26c: 65 ska 1 +276: 6b rm 3 ; [1:1].3 = A.0 +23b: 00 nop +25d: 7d f7 tml 377 ; call 377 // input stream id bit +217: 65 ska 1 +24b: 68 rm 0 ; [1:1].0 = A.0 +265: 00 nop +232: 7d f7 tml 377 ; call 377 // input stream id bit +20c: 65 ska 1 +246: 69 rm 1 ; [1:1].1 = A.0 +223: 00 nop +251: 7d f7 tml 377 ; call 377 // input stream id bit +254: 65 ska 1 +26a: 6a rm 2 ; [1:1].2 = A.0 + ; } + +235: 74 lbmi 0 +21a: 21 lbli 1 +20d: 3f ldi f ; A := f +206: 31 ldi 1 ; A := 1 +203: 42 xi ; [0:1] := A +241: 31 ldi 1 ; A := 1 +220: 39 ldi 9 ; A := 9 +250: 42 xi ; [0:2] = A +268: 32 ldi 2 ; A := 2 +274: 35 ldi 5 ; A := 5 +27a: 42 xi ; [0:3] := A +23d: 33 ldi 3 ; A := 3 +21e: 32 ldi 2 ; A := 2 +20f: 42 xi ; [0:4] := A +247: 3f ldi f +263: 42 xi ; [0:5] := f +271: 38 ldi 8 +238: 42 xi ; [0:6] := 8 +25c: 32 ldi 2 +26e: 42 xi ; [0:7] := 2 +237: 37 ldi 7 +25b: 42 xi ; [0:8] := 7 +26d: 31 ldi 1 +236: 42 xi ; [0:9] := 1 +21b: 39 ldi 9 +24d: 42 xi ; [0:a] := 9 +226: 38 ldi 8 +213: 42 xi ; [0:b] := 6 +249: 31 ldi 1 +224: 42 xi ; [0:c] := 1 +252: 31 ldi 1 +229: 42 xi ; [0:d] := 1 +214: 31 ldi 1 +24a: 42 xi ; [0:e] := 1 +225: 35 ldi 5 +212: 41 x ; [0:f] := 5 +209: 75 lbmi 1 +204: 22 lbli 2 +242: 34 ldi 4 ; A := 4 +221: 39 ldi 9 ; A := 9 +210: 42 xi ; [1:2] := A +248: 3f ldi f ; A := f +264: 35 ldi 5 ; A := 5 +272: 42 xi ; [1:3] := A +239: 35 ldi 5 ; A := 5 +21c: 32 ldi 2 ; A := 2 +24e: 42 xi ; [1:4] := A +227: 31 ldi 1 +253: 42 xi ; [1:5] := 1 +269: 32 ldi 2 +234: 42 xi ; [1:6] := 2 +25a: 31 ldi 1 +22d: 42 xi ; [1:7] := 1 +216: 37 ldi 7 +20b: 42 xi ; [1:8] := 7 +245: 31 ldi 1 +222: 42 xi ; [1:9] := 1 +211: 39 ldi 9 +208: 42 xi ; [1:a] := 9 +244: 38 ldi 8 +262: 42 xi ; [1:b] := 8 +231: 35 ldi 5 +218: 42 xi ; [1:c] := 5 +24c: 37 ldi 7 +266: 42 xi ; [1:d] := 7 +233: 31 ldi 1 +259: 42 xi ; [1:e] := 1 +22c: 35 ldi 5 +256: 41 x ; [1:f] := 5 +22b: 4c rit + + + +;;{{{ +255: 00 nop +22a: 00 nop +215: 00 nop +20a: 00 nop +205: 00 nop +202: 00 nop +201: 00 nop + +27f: 80 t 200 +;;}}} + + + + ;; OUTPUT STREAM ID BIT +300: 20 lbli 0 +340: 4a s +360: 30 ldi 0 +370: 41 x ; [H:0] := 0 +378: 46 out ; P0 := A +37c: 00 nop +37e: 00 nop +33f: 47 out0 ; P0 := 0 +35f: 21 lbli 1 ; L := 1 +36f: 4c rit + + + + ;; INPUT STREAM ID BIT +377: 20 lbli 0 +37b: 00 nop +37d: 00 nop +33e: 00 nop +31f: 00 nop +34f: 00 nop +367: 55 in ; A := P0 +373: 00 nop +379: 21 lbli 1 ; L := 1 +33c: 4c rit + + + + ;; MANGLE BOTH +35e: 74 lbmi 0 ; H := 0 +32f: 7d f5 tml 375 ; call 375 // mangle one +36b: 75 lbmi 1 ; H := 1 + ; // mangle one + + + + ;; MANGLE ONE +375: 2f lbli f +33a: 40 l ; A := [H:f] + + ; forever { +31d: 5c lxa ; X := A +30e: 48 sc +307: 21 lbli 1 +343: 72 adc +361: 4a s ; [H:1] += X + 1 +330: 52 li +358: 72 adc +36c: 54 coma +376: 42 xi ; A := [H:2] ; [H:2] = ~([H:1] + [H:2] + 1) ; L := 3 +33b: 73 adcsk ; A += [H:3] + 1 ; if no carry: +35d: 42 xi ; t = A ; A := [H:3] ; [H:3] := t ; L++ +32e: 70 ad +317: 4a s ; [H:L] += A +34b: 52 li ; A := [H:L] ; L++ +365: 49 rc ; C := 0 +332: 72 adc ; A += [H:L] +319: 42 xi ; t = [H:L] ; [H:L] := A ; A := t ; L++ +30c: 08 adi 8 ; A += 8 ; if no carry: +346: 72 adc ; A += [H:L] +323: 42 xi ; t = [H:L] ; [H:L] := A ; A := t ; L++ + +351: 01 adi 1 +328: 00 nop +354: 72 adc +36a: 4a s +335: 52 li +31a: d1 t 351 +30d: 5d xax +306: 0f adi f +303: 4c rit +341: 9d t 31d + + + + ;; MAGIC +320: 74 lbmi 0 ; H := 0 +350: 21 lbli 1 ; L := 1 +368: 3f ldi f ; A := f +374: 32 ldi 2 ; A := 2 +37a: 5c lxa ; X := A +33d: 5e ??? ; ???5e??? +31e: 5d xax ; swap A, X +30f: 48 sc ; C := 1 +347: 44 nega ; A := -A ; if A <> 0: +363: 35 ldi 5 ; A := 5 +371: 41 x ; swap A, [HL] +338: 4c rit + + + +;;{{{ +35c: 00 nop +36e: 00 nop +337: 00 nop +35b: 00 nop +36d: 00 nop +336: 00 nop +31b: 00 nop +34d: 00 nop +326: 00 nop +313: 00 nop +349: 00 nop +324: 00 nop +352: 00 nop +329: 00 nop +314: 00 nop +34a: 00 nop +325: 00 nop +312: 00 nop +309: 00 nop +304: 00 nop +342: 00 nop +321: 00 nop +310: 00 nop +348: 00 nop +364: 00 nop +372: 00 nop +339: 00 nop +31c: 00 nop +34e: 00 nop +327: 00 nop +353: 00 nop +369: 00 nop +334: 00 nop +35a: 00 nop +32d: 00 nop +316: 00 nop +30b: 00 nop +345: 00 nop +322: 00 nop +311: 00 nop +308: 00 nop +344: 00 nop +362: 00 nop +331: 00 nop +318: 00 nop +34c: 00 nop +366: 00 nop +333: 00 nop +359: 00 nop +32c: 00 nop +356: 00 nop +32b: 00 nop +355: 00 nop +32a: 00 nop +315: 00 nop +30a: 00 nop +305: 00 nop +302: 00 nop +301: 00 nop + +37f: ff t 37f +;;}}} + +;; vi:fdm=marker:cms=;;%s:fdo=: diff --git a/dissassembly/nescic.txt b/dissassembly/nescic.txt new file mode 100644 index 0000000..9fd4b25 --- /dev/null +++ b/dissassembly/nescic.txt @@ -0,0 +1,64 @@ +0000011101000101110001011000000110000001101000111100010100010001 +1001100001000000110010100000100010011010100100101100101000100000 +0101000001100110001011000000110000001100000100000010111001000000 +0101000001000000010001000000010001000000001100000000010001000000 +0011010000010100001100000000000010110100101101000001010000010000 +0100100010000000000100010001000100011001010100001001110100001000 +1000000100001000100100000001000000010000100100011001100010000000 +0001000000100011001101010001010000010010000100100111011100010000 +0110001001111000100100100100100011000010100000111001101001100010 +0000000000000001010000000100000000000000000000000100000100000000 +0101000101000101000000010000000100010100010100010000010001000000 +0000000000000011000100000000000000110011001100110001001000000000 +0001000000010000000100000001000000000000000100000000000000010000 +0000000001000100000000000000000000000100000001000100010000000000 +0011001100110000000100000010000000010000001000000001000100000000 +0110001100100100001000000010000000010100010100100000010100100000 +0011010000110000111001011100110101110100010101001100110100100000 +0000000000000000010100000100100000000100000101000101110000000000 +0000100000110000100010000011100010001000000000001011100010000000 +1000000010000000100000011000100000000001100000000000000100000000 +0011000100100010000000010010000000000011001100010001001100010000 +0001000000010001000000000000000100010000000100000001000100000000 +0000000000000000000000000000000000000000000000000000000000000000 +0001000100000001000100010101000100000001000000010101000000000000 +0010100100000000001100110011000000110001000110000011001100000000 +0000100000101010111010001110100000100010001000101100001000000000 +0000000100000000000000000000000100010000000100000000000100000000 +0000000000000000000000000000000000000000000000000000000000000000 +0110000100000110001110010011100000110011100000110111111000100000 +0000000000000000000000000000000000000000000000000000000000000000 +0010001000000001001000100000001100110010000100000010000100000010 +0110000001100010110101001001001010010101110111011101011000110000 +0010001001000000011000100000001011100110111001101110001001011001 +0101011100111001000101000000010001101110011111110001010100000000 +0001111001000100010010100000001000001111100111110100001000001000 +1011000101101010100100001100000010011011000010111101000000100100 +1011100000110010010000000100100000111000100110011001001101110000 +1001101001000001110000000000000010000010100010101101000100000000 +1100110100001010000011010000000111001101000111011100101111101000 +1000001100011110010100100100000001000010110000111101111000000010 +1000110100110100101111001000000010000111110111111111100000000000 +0001101110001101010110001000000101001000010110011101011101000000 +0100000001000000010001000000000000010100000101000100010001000001 +0100101100000100011000110000000001111001001110110110011000000000 +0010010000001010100000001100000011010101110101011110101000000000 +0000111000000001101001001001010010100110010101100000110111110000 +0011111000000000110101100000101111111111111111111101001001000000 +1110010110101010101001010000010000010101111101010110111101000000 +1111001000101100100100000000000010010010010001101011110000000001 +1100110001000111011111000000000010111100100111000111111100100100 +0110100101101110110110001001100010111001101110011101011000100000 +1010111110110010100111110001000000100110001111111000100100110000 +1000000100001000100001010000011110000001100000111000111100000000 +0010000000000011001100000011000100110000000100010011001100000000 +0100101001010101101110001000000011101011111010111011110001100000 +0001011000011111010101100100001001000111100101111110110000010100 +0011111110110010101100100001001001000110010111111011000100010000 +1010101011010001101000000111011000101100001011101111001111010000 +0101011000000000001101000011000000110110001101100011000000000000 +1110000110101100100000011000001000110011110010110100010010100000 +0000001000111011101000101011001010100010101000101001100100000000 +0110000001000101001100100011000000110010001100100011010101000000 +0001011101000000011000000100010001100110001001100110000101100000 +0100011000010011010010010001110111001100101011000101100000000011 diff --git a/dissassembly/pinout.txt b/dissassembly/pinout.txt new file mode 100644 index 0000000..28b49a8 --- /dev/null +++ b/dissassembly/pinout.txt @@ -0,0 +1,38 @@ + NES CIC: + +------------------+ + DATA_OUT <-- | 1 P0.0 +5V 16 | + DATA_IN --> | 2 P0.1 P3.2 15 | ? + SEED --> | 3 P0.2 P3.1 14 | ? +LOCK/-KEY --> | 4 P0.3 P3.0 13 | ? + | 5 Xout P1.3 12 | <-- RESET_SPEED_B + | 6 Xin P1.2 11 | <-- RESET_SPEED_A + | 7 RESET P1.1 10 | --> SLAVE_CIC_RESET + | 8 GND P1.0 9 | --> -HOST_RESET + +------------------+ + + + SNES CIC: + +------------------+ + DATA_OUT <-- | 1 P0.0 +5V 16 | + DATA_IN --> | 2 P0.1 P3.2 15 | ? + SEED --> | 3 P0.2 P3.1 14 | ? +LOCK/-KEY --> | 4 P0.3 P3.0 13 | ? + | 5 Xout P1.3 12 | ? + | 6 Xin P1.2 11 | ? + | 7 RESET P1.1 10 | --> SLAVE_CIC_RESET + | 8 GND P1.0 9 | --> -HOST_RESET + +------------------+ + + + SNES PIF: + +------------------+ + DATA_OUT <-- | 1 P0.0 +5V 18 | + DATA_IN --> | 2 P0.1 P3.2 17 | ? + SEED --> | 3 P0.2 P3.1 16 | ? +LOCK/-KEY --> | 4 P0.3 P3.0 15 | <-- ? + | 5 N/C N/C 14 | + | 6 Xout P1.3 13 | ? + | 7 Xin P1.2 12 | --> ? + | 8 RESET P1.1 11 | --> SLAVE_CIC_RESET + | 9 GND P1.0 10 | --> -PPU2_RESET + +------------------+ diff --git a/supercic/supercic-key.asm b/supercic/supercic-key.asm new file mode 100644 index 0000000..e3bdfea --- /dev/null +++ b/supercic/supercic-key.asm @@ -0,0 +1,754 @@ + #include +processor p12f629 + +; --------------------------------------------------------------------- +; feature enhanced SNES CIC clone for PIC Microcontroller (key mode only) +; +; Copyright (C) 2010 by Maximilian Rehkopf (ikari_01) +; This software is part of the sd2snes project. +; +; Last Modified: Oct. 2015 by Peter Bartmann +; +; Based on reverse engineering work and disassembly by segher, +; http://hackmii.com/2010/01/the-weird-and-wonderful-cic/ +; +; This program is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation; version 2 of the License only. +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +; +; --------------------------------------------------------------------- +; +; pin configuration: (cartridge pin) [key CIC pin] +; +; ,---_---. +; +5V (27,58) [16] |1 8| GND (5,36) [8] +; CIC clk (56) [6] |2 7| CIC data i/o 0 (55) [2] +; status out |3 6| CIC data i/o 1 (24) [1] +; /PAIR |4 5| CIC slave reset (25) [7] +; `-------' +; +; +; Status out can be connected to a LED. It indicates: +; +; state | output +; -------------------------+---------------------------- +; OK or no lock CIC | high +; error | low +; SuperCIC pair mode | 148.75kHz / 50% duty cycle +; SuperCIC host detected | scarce spikes (3.3us) +; but pair mode disabled | +; +; In case lockout fails, the region is switched automatically and +; will be used after the next reset. +; +; The /PAIR pin can be used to enable or disable SuperCIC pair mode. +; It can be tied low or high to statically enable or disable pair mode +; detection, or connected to a switch or MCU to dynamically enable pair +; mode detection (it should then be connected to a pull-up resistor to +; Vcc). Pair mode detection can be enabled during operation, +; but pair mode cannot be left until the next power cycle. +; See SuperCIC lock documentation for a more detailed description of +; pair mode. +; +; memory usage: +; +; 0x20 buffer for seed calc and transfer +; 0x21 - 0x2f seed area (lock seed) +; 0x30 buffer for seed calc +; 0x31 - 0x3f seed area (key seed; 0x31 filled in by lock) +; 0x40 - 0x41 buffer for seed calc +; 0x4d buffer for eeprom access +; 0x4e loop variable for longwait +; 0x4f loop variable for wait +; 0x5c GPIO buffer variable for pair mode allow +; 0x5d 0: SuperCIC pair mode available flag +; 0x5e SuperCIC pair mode detect (phase 1) +; 0x5f SuperCIC pair mode detect (phase 2) +; --------------------------------------------------------------------- + + +; ----------------------------------------------------------------------- + __CONFIG _EC_OSC & _WDT_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _CPD_OFF + +; ----------------------------------------------------------------------- +; code memory + org 0x0000 + nop + nop + nop + goto init +isr + org 0x0004 + bcf INTCON, 1 ; clear interrupt cause + bcf GPIO, 0 + bcf GPIO, 1 + bsf GPIO, 4 ; LED on + clrf 0x5e ; clear pair mode detect + clrf 0x5f ; clear pair mode detect + bsf 0x5f, 1 ; + clrf 0x5d ; clear pair mode available + clrf 0x5c ; clear pair mode allow buffer + bsf 0x5c, 3 ; assume disallow + bsf INTCON, 7 ; re-enable interrupts (ISR will continue as main) + goto main +init + org 0x0010 + bcf STATUS, RP0 + clrf GPIO + movlw 0x07 ; GPIO2..0 are digital I/O (not connected to comparator) + movwf CMCON + movlw 0x90 ; global enable interrupts + enable external interrupt + movwf INTCON + bsf STATUS, RP0 + movlw 0x2d ; in out in in out in + movwf TRISIO + movlw 0x24 ; pullups for reset+clk to avoid errors when no CIC in host + movwf WPU + movlw 0x00 ; 0x80 for global pullup disable + movwf OPTION_REG + + bcf STATUS, RP0 + bsf GPIO, 4 ; LED on +idle + goto idle ; wait for interrupt from lock + +main + bsf STATUS, RP0 + bsf TRISIO, 0 + bcf TRISIO, 1 + bcf STATUS, RP0 +; --------INIT LOCK SEED (what the lock sends)-------- + movlw 0xb + movwf 0x21 + movlw 0x1 + movwf 0x22 + movlw 0x4 + movwf 0x23 + movlw 0xf + movwf 0x24 + movlw 0x4 + movwf 0x25 + movlw 0xb + movwf 0x26 + movlw 0x5 + movwf 0x27 + movlw 0x7 + movwf 0x28 + movlw 0xf + movwf 0x29 + movlw 0xd + movwf 0x2a + movlw 0x6 + movwf 0x2b + movlw 0x1 + movwf 0x2c + movlw 0xe + movwf 0x2d + movlw 0x9 + movwf 0x2e + movlw 0x8 + movwf 0x2f + +; --------INIT KEY SEED (what we must send)-------- + bsf STATUS, RP0 ; D/F411 and D/F413 + clrf EEADR ; differ in 2nd seed nibble + bsf EECON1, RD ; of key stream, + movf EEDAT, w ; restore saved nibble from EEPROM + bcf STATUS, RP0 + movwf 0x32 + movlw 0xa + movwf 0x33 + movlw 0x1 + movwf 0x34 + movlw 0x8 + movwf 0x35 + movlw 0x5 + movwf 0x36 + movlw 0xf + movwf 0x37 + movlw 0x1 + movwf 0x38 + movwf 0x39 + movlw 0xe + movwf 0x3a + movlw 0x1 + movwf 0x3b + movlw 0x0 + movwf 0x3c + movlw 0xd + movwf 0x3d + movlw 0xe + movwf 0x3e + movlw 0xc + movwf 0x3f + +; --------wait for stream ID-------- + movlw 0xb5 + call wait + clrf 0x31 ; clear lock stream ID + +; --------lock sends stream ID. 15 cycles per bit-------- +; bsf GPIO, 0 ; (debug marker) +; bcf GPIO, 0 ; + btfsc GPIO, 0 ; check stream ID bit + bsf 0x31, 3 ; copy to lock seed + movlw 0x2 ; wait=3*W+5 + call wait ; burn 11 cycles + nop + nop + +; bsf GPIO, 0 +; bcf GPIO, 0 + btfsc GPIO, 0 ; check stream ID bit + bsf 0x31, 0 ; copy to lock seed + movlw 0x2 ; + call wait ; burn 11 cycles + nop + nop + +; bsf GPIO, 0 +; bcf GPIO, 0 + btfsc GPIO, 0 ; check stream ID bit + bsf 0x31, 1 ; copy to lock seed + movlw 0x2 ; + call wait ; burn 11 cycles + nop + nop + +; bsf GPIO, 0 +; bcf GPIO, 0 + btfsc GPIO, 0 ; check stream ID bit + bsf 0x31, 2 ; copy to lock seed + bsf STATUS, RP0 + bcf TRISIO, 0 + bsf TRISIO, 1 + bcf STATUS, RP0 + movlw 0x27 ; "wait" 1 + call wait ; wait 121 + nop +; --------main loop-------- +loop + movlw 0x1 +loop0 + addlw 0x30 ; key stream + movwf FSR ; store in index reg +loop1 + nop + movf INDF, w ; load seed value + movwf 0x20 + bcf 0x20, 1 ; clear bit 1 + btfsc 0x20, 0 ; copy from bit 0 + bsf 0x20, 1 ; (if set) + bsf 0x20, 4 ; LED on + movf 0x20, w + movwf GPIO + nop + nop + nop + nop + movlw 0x10 + movwf GPIO ; reset GPIO + movlw 0x13 + call wait + nop + btfsc 0x5d, 0 ; pair mode available signal + bcf GPIO, 4 ; + nop + nop + bsf GPIO, 4 ; + btfsc GPIO, 0 ; both pins must be low... + goto die + btfsc GPIO, 1 ; ...when no bit transfer takes place + goto die ; if not -> lock cic error state -> die + incf FSR, f ; next one + movlw 0xf + andwf FSR, w + btfss STATUS, Z + goto loop1 + call mangle + call mangle + call mangle + movlw 0x2 ; wait 10 + call wait ; + nop + nop + btfsc 0x37, 0 + goto swap + bsf STATUS, RP0 + bcf TRISIO, 0 + bsf TRISIO, 1 + goto swapskip +swap + bsf STATUS, RP0 + bsf TRISIO, 0 + bcf TRISIO, 1 + nop +swapskip + bcf STATUS, RP0 + movf 0x37, w + andlw 0xf + btfss STATUS, Z + goto loop0 + goto loop + +; --------calculate new seeds-------- +; had to be unrolled because PIC has an inefficient way of handling +; indirect access, no post increment, etc. +mangle + call mangle_lock + movf GPIO, w ; buffer GPIO state + movwf 0x5c ; for pair mode "transaction" +mangle_key + movf 0x2f, w + movwf 0x20 +mangle_key_loop + addlw 0x1 + addwf 0x21, f + movf 0x22, w + movwf 0x40 + movf 0x21, w + addwf 0x22, f + incf 0x22, f + comf 0x22, f + movf 0x23, w + movwf 0x41 ; store 23 to 41 + movlw 0xf + andwf 0x23, f + movf 0x40, w ; add 40(22 old)+23+#1 and skip if carry + andlw 0xf + addwf 0x23, f + incf 0x23, f + btfsc 0x23, 4 + goto mangle_key_withskip +mangle_key_withoutskip + movf 0x41, w ; restore 23 + addwf 0x24, f ; add to 24 + movf 0x25, w + movwf 0x40 ; save 25 to 40 + movf 0x24, w + addwf 0x25, f + movf 0x26, w + movwf 0x41 ; save 26 to 41 + movf 0x40, w ; restore 25 + andlw 0xf ; mask nibble + addlw 0x8 ; add #8 to HIGH nibble + movwf 0x40 + btfss 0x40, 4 ; skip if carry to 5th bit + addwf 0x26, w + movwf 0x26 + + movf 0x41, w ; restore 26 + addlw 0x1 ; inc + addwf 0x27, f ; add to 27 + + movf 0x27, w ; + addlw 0x1 ; inc + addwf 0x28, f ; add to 28 + + movf 0x28, w ; + addlw 0x1 ; inc + addwf 0x29, f ; add to 29 + + movf 0x29, w ; + addlw 0x1 ; inc + addwf 0x2a, f ; add to 2a + + movf 0x2a, w ; + addlw 0x1 ; inc + addwf 0x2b, f ; add to 2b + + movf 0x2b, w ; + addlw 0x1 ; inc + addwf 0x2c, f ; add to 2c + + movf 0x2c, w ; + addlw 0x1 ; inc + addwf 0x2d, f ; add to 2d + + movf 0x2d, w ; + addlw 0x1 ; inc + addwf 0x2e, f ; add to 2e + + movf 0x2e, w ; + addlw 0x1 ; inc + addwf 0x2f, f ; add to 2f + + movf 0x20, w ; restore original 0xf + andlw 0xf + addlw 0xf + movwf 0x20 + + btfsc 0x5d, 0 ; pair mode available signal + bcf GPIO, 4 + nop + nop + bsf GPIO, 4 + + nop + nop + nop + nop + btfss 0x20, 4 ; skip if half-byte carry + goto mangle_return ; +2 cycles in return + nop + goto mangle_key_loop +; 69 when goto, 69 when return +; CIC has 78 -> 9 nops + +mangle_key_withskip + movf 0x41, w ; restore 23 + addwf 0x23, f ; add to 23 + movf 0x24, w + movwf 0x40 ; save 24 to 40 + movf 0x23, w + addwf 0x24, f + movf 0x25, w + movwf 0x41 ; save 25 to 41 + movf 0x40, w ; restore 24 + andlw 0xf ; mask nibble + addlw 0x8 ; add #8 to HIGH nibble + movwf 0x40 + btfss 0x40, 4 ; skip if carry to 5th bit + addwf 0x25, w + movwf 0x25 + + movf 0x41, w ; restore 25 + addlw 0x1 ; inc + addwf 0x26, f ; add to 26 + + movf 0x26, w ; + addlw 0x1 ; inc + addwf 0x27, f ; add to 27 + + movf 0x27, w ; + addlw 0x1 ; inc + addwf 0x28, f ; add to 28 + + movf 0x28, w ; + addlw 0x1 ; inc + addwf 0x29, f ; add to 29 + + movf 0x29, w ; + addlw 0x1 ; inc + addwf 0x2a, f ; add to 2a + + movf 0x2a, w ; + addlw 0x1 ; inc + addwf 0x2b, f ; add to 2b + + movf 0x2b, w ; + addlw 0x1 ; inc + addwf 0x2c, f ; add to 2c + + movf 0x2c, w ; + addlw 0x1 ; inc + addwf 0x2d, f ; add to 2d + + movf 0x2d, w ; + addlw 0x1 ; inc + addwf 0x2e, f ; add to 2e + + movf 0x2e, w ; + addlw 0x1 ; inc + addwf 0x2f, f ; add to 2f + + movf 0x20, w ; restore original 0xf + andlw 0xf + addlw 0xf + movwf 0x20 +;-------pair mode code------- + bcf GPIO, 0 + movf GPIO, w + btfss 0x5c, 3 + bsf GPIO, 0 + movwf 0x5e + movf GPIO, w + movwf 0x5f + bcf GPIO, 0 + + btfsc 0x5d, 0 ; pair mode available signal + bcf GPIO, 4 + bsf GPIO, 4 +;-------end of pair mode code------- + btfss 0x20, 4 ; skip if half-byte carry + goto mangle_return ; +2 cycles in return + movf 0x20, w ; restore w (previously destroyed) + goto mangle_key_loop +mangle_return + return +; 73 when goto, 73 when return +; CIC has 84 -> 11 nops + +mangle_lock + movf 0x3f, w + movwf 0x30 +mangle_lock_loop + addlw 0x1 + addwf 0x31, f + movf 0x32, w + movwf 0x40 + movf 0x31, w + addwf 0x32, f + incf 0x32, f + comf 0x32, f + movf 0x33, w + movwf 0x41 ; store 33 to 41 + movlw 0xf + andwf 0x33, f + movf 0x40, w ; add 40(32 old)+33+#1 and skip if carry + andlw 0xf + addwf 0x33, f + incf 0x33, f + btfsc 0x33, 4 + goto mangle_lock_withskip +mangle_lock_withoutskip + movf 0x41, w ; restore 33 + addwf 0x34, f ; add to 34 + movf 0x35, w + movwf 0x40 ; save 35 to 40 + movf 0x34, w + addwf 0x35, f + movf 0x36, w + movwf 0x41 ; save 36 to 41 + movf 0x40, w ; restore 35 + andlw 0xf ; mask nibble + addlw 0x8 ; add #8 to HIGH nibble + movwf 0x40 + btfss 0x40, 4 ; skip if carry to 5th bit + addwf 0x36, w + movwf 0x36 + + movf 0x41, w ; restore 36 + addlw 0x1 ; inc + addwf 0x37, f ; add to 37 + + movf 0x37, w ; + addlw 0x1 ; inc + addwf 0x38, f ; add to 38 + + movf 0x38, w ; + addlw 0x1 ; inc + addwf 0x39, f ; add to 39 + + movf 0x39, w ; + addlw 0x1 ; inc + addwf 0x3a, f ; add to 3a + + movf 0x3a, w ; + addlw 0x1 ; inc + addwf 0x3b, f ; add to 3b + + movf 0x3b, w ; + addlw 0x1 ; inc + addwf 0x3c, f ; add to 3c + + movf 0x3c, w ; + addlw 0x1 ; inc + addwf 0x3d, f ; add to 3d + + movf 0x3d, w ; + addlw 0x1 ; inc + addwf 0x3e, f ; add to 3e + + movf 0x3e, w ; + addlw 0x1 ; inc + addwf 0x3f, f ; add to 3f + + movf 0x30, w ; restore original 0xf + andlw 0xf + addlw 0xf + movwf 0x30 + + btfsc 0x5d, 0 ; pair mode available signal + bcf GPIO, 4 + nop + nop + bsf GPIO, 4 + + nop + nop + nop + nop + btfss 0x30, 4 ; skip if half-byte carry + goto mangle_return + nop + goto mangle_lock_loop +; 69 when goto, 69 when return +; CIC has 78 -> 9 nops + +mangle_lock_withskip + movf 0x41, w ; restore 33 + addwf 0x33, f ; add to 33 + movf 0x34, w + movwf 0x40 ; save 34 to 40 + movf 0x33, w + addwf 0x34, f + movf 0x35, w + movwf 0x41 ; save 35 to 41 + movf 0x40, w ; restore 34 + andlw 0xf ; mask nibble + addlw 0x8 ; add #8 to HIGH nibble + movwf 0x40 + btfss 0x40, 4 ; skip if carry to 5th bit + addwf 0x35, w + movwf 0x35 + + movf 0x41, w ; restore 35 + addlw 0x1 ; inc + addwf 0x36, f ; add to 36 + + movf 0x36, w ; + addlw 0x1 ; inc + addwf 0x37, f ; add to 37 + + movf 0x37, w ; + addlw 0x1 ; inc + addwf 0x38, f ; add to 38 + + movf 0x38, w ; + addlw 0x1 ; inc + addwf 0x39, f ; add to 39 + + movf 0x39, w ; + addlw 0x1 ; inc + addwf 0x3a, f ; add to 3a + + movf 0x3a, w ; + addlw 0x1 ; inc + addwf 0x3b, f ; add to 3b + + movf 0x3b, w ; + addlw 0x1 ; inc + addwf 0x3c, f ; add to 3c + + movf 0x3c, w ; + addlw 0x1 ; inc + addwf 0x3d, f ; add to 3d + + movf 0x3d, w ; + addlw 0x1 ; inc + addwf 0x3e, f ; add to 3e + + movf 0x3e, w ; + addlw 0x1 ; inc + addwf 0x3f, f ; add to 3f + + movf 0x30, w ; restore original 0xf + andlw 0xf + addlw 0xf + movwf 0x30 +;-------pair mode code------- + btfss 0x5e, 1 + goto scic_pair_skip1 + btfsc 0x5f, 1 + goto scic_pair_skip2 + btfsc 0x5c, 3 + goto scic_pair_skip3 + goto supercic_pairmode +scic_pair_skip1 + nop + nop +scic_pair_skip2 + nop + nop + nop + nop + goto scic_pair_skip4 +scic_pair_skip3 + bcf GPIO, 4 + bsf 0x5d, 0 ; set pair mode available + nop + bsf GPIO, 4 + +scic_pair_skip4 +;-------end of pair mode code------- + btfss 0x30, 4 ; skip if half-byte carry + goto mangle_return + nop + goto mangle_lock_loop +; 73 when goto, 73 when return +; CIC has 84 -> 11 nops + +; --------wait: 3*(W-1)+7 cycles (including call+return). W=0 -> 256!-------- +wait + movwf 0x4f +wait0 decfsz 0x4f, f + goto wait0 + return + +; --------wait long: 8+(3*(w-1))+(772*w). W=0 -> 256!-------- +longwait + movwf 0x4e + clrw +longwait0 + call wait + decfsz 0x4e, f + goto longwait0 + return + +; --------change region in eeprom and die-------- +die + movlw 0x3a ;wait 50ms before writing + call longwait ;("error" might be due to power loss) + bsf STATUS, RP0 + clrw + movwf EEADR + bsf EECON1, RD + movf EEDAT, w + bcf STATUS, RP0 + movwf 0x4d + btfsc 0x4d, 0 + goto die_reg_6 +die_reg_9 + movlw 0x9 ; died with PAL, fall back to NTSC + goto die_reg_cont +die_reg_6 + movlw 0x6 ; died with NTSC, fall back to PAL +die_reg_cont + bsf STATUS, RP0 + movwf EEDAT + bsf EECON1, WREN + +die_intloop + bcf INTCON, GIE + btfsc INTCON, GIE + goto die_intloop + + movlw 0x55 + movwf EECON2 + movlw 0xaa + movwf EECON2 + bsf EECON1, WR + bsf INTCON, GIE + + bcf STATUS, RP0 + bcf GPIO, 4 +; --------get caught up-------- +die_trap + goto die_trap +; ----------------------------------------------------------------------- +supercic_pairmode + bsf STATUS, RP0 + bsf TRISIO, 0 + bsf TRISIO, 1 + bcf STATUS, RP0 +supercic_pairmode_loop + bsf GPIO, 4 + nop + nop + bcf GPIO, 4 + goto supercic_pairmode_loop + +; eeprom memory + org __EEPROM_START + de 0x09 ; D411 (NTSC) + end diff --git a/supercic/supercic-key.hex b/supercic/supercic-key.hex new file mode 100644 index 0000000..93c2f96 --- /dev/null +++ b/supercic/supercic-key.hex @@ -0,0 +1,71 @@ +:020000040000FA +:1000000000000000000010288B1005108510051658 +:10001000DE01DF01DF14DD01DC01DC158B17202898 +:10002000831285010730990090308B0083162D30A4 +:1000300085002430950000308100831205161F28AA +:1000400083160514851083120B30A1000130A20025 +:100050000430A3000F30A4000430A5000B30A6002C +:100060000530A7000730A8000F30A9000D30AA0006 +:100070000630AB000130AC000E30AD000930AE00F0 +:100080000830AF0083169B011C141A088312B200BB +:100090000A30B3000130B4000830B5000530B600B6 +:1000A0000F30B7000130B800B9000E30BA0001308F +:1000B000BB000030BC000D30BD000E30BE000C3067 +:1000C000BF00B530E221B1010518B1150230E221BF +:1000D00000000000051831140230E2210000000089 +:1000E0000518B1140230E221000000000518311596 +:1000F00083160510851483122730E2210000013099 +:10010000303E840000000008A000A0102018A014B9 +:1001100020162008850000000000000000001030BC +:1001200085001330E22100005D1805120000000078 +:1001300005160518EC298518EC29840A0F300405EA +:10014000031D8228B920B920B9200230E221000025 +:1001500000003718AF28831605108514B3288316BE +:10016000051485100000831237080F39031D8028FD +:100170007F284C210508DC002F08A000013EA107C4 +:100180002208C0002108A207A20AA2092308C10070 +:100190000F30A30540080F39A307A30A231A0B2920 +:1001A0004108A4072508C0002408A5072608C100A7 +:1001B00040080F39083EC000401E2607A60041082F +:1001C000013EA7072708013EA8072808013EA90706 +:1001D0002908013EAA072A08013EAB072B08013E69 +:1001E000AC072C08013EAD072D08013EAE072E08D6 +:1001F000013EAF0720080F390F3EA0005D18051221 +:100200000000000005160000000000000000201E95 +:100210004B290000BE284108A3072408C00023087A +:10022000A4072508C10040080F39083EC000401E41 +:100230002507A5004108013EA6072608013EA7079D +:100240002708013EA8072808013EA9072908013E02 +:10025000AA072A08013EAB072B08013EAC072C0871 +:10026000013EAD072D08013EAE072E08013EAF0747 +:1002700020080F390F3EA00005100508DC1D0514ED +:10028000DE000508DF0005105D1805120516201EAA +:100290004B292008BE2808003F08B000013EB107E6 +:1002A0003208C0003108B207B20AB2093308C100EF +:1002B0000F30B30540080F39B307B30A331A9B292F +:1002C0004108B4073508C0003408B5073608C10036 +:1002D00040080F39083EC000401E3607B6004108EE +:1002E000013EB7073708013EB8073808013EB90795 +:1002F0003908013EBA073A08013EBB073B08013EF8 +:10030000BC073C08013EBD073D08013EBE073E0854 +:10031000013EBF0730080F390F3EB0005D180512CF +:100320000000000005160000000000000000301E64 +:100330004B2900004E294108B3073408C000330898 +:10034000B4073508C10040080F39083EC000401E00 +:100350003507B5004108013EB6073608013EB7072C +:100360003708013EB8073808013EB9073908013E91 +:10037000BA073A08013EBB073B08013EBC073C08F0 +:10038000013EBD073D08013EBE073E08013EBF07D6 +:1003900030080F390F3EB000DE1CD329DF18D529F5 +:1003A000DC19DA29092A0000000000000000000022 +:1003B0000000DE2905125D1400000516301E4B29D1 +:1003C00000004E29CF00CF0BE3290800CE00030127 +:1003D000E221CE0BE82908003A30E621831603011A +:1003E0009B001C141A088312CD004D18F9290930FE +:1003F000FA29063083169A001C158B138B1BFD29D6 +:1004000055309D00AA309D009C148B178312051255 +:10041000082A8316051485148312051600000000AF +:0404200005120D2A8A +:02400E00D33F9E +:024200000900B3 +:00000001FF diff --git a/supercic/supercic-lock.asm b/supercic/supercic-lock.asm new file mode 100644 index 0000000..3e10877 --- /dev/null +++ b/supercic/supercic-lock.asm @@ -0,0 +1,1134 @@ +use_16f676 set 0 ; 0 = 16F630, 1 = 16F676 + +if use_16f676 + #include + processor p16f676 +else + #include + processor p16f630 +endif +; --------------------------------------------------------------------- +; feature enhanced auto region switching SNES CIC clone +; for PIC Microcontrollers (lock mode) +; +; Copyright (C) 2010 by Maximilian Rehkopf (ikari_01) +; This software is part of the sd2snes project. +; +; Last Modified: Oct. 2015 by Peter Bartmann +; +; Based on reverse engineering work and disassembly by segher. +; http://hackmii.com/2010/01/the-weird-and-wonderful-cic/ +; +; This program is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation; version 2 of the License only. +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +; +; --------------------------------------------------------------------- +; +; pin configuration: (cartridge slot pin) [original 18-pin SMD lock CIC pin] +; {alternative pin function in pair mode} +; +; ,-----_-----. +; +5V (27,58) [18] |1 14| GND (5,36) [9] +; CIC clk in (56) [7] |2 A5 A0 13| CIC lock reset in [8] +; D4 out |3 A4 A1 12| 50/60Hz out +; REG_TIMEOUT in |4 A3 A2 11| host reset out [10] +; LED out (grn) |5 C5 C0 10| CIC data i/o 0 (55) [1] / {50/60Hz in} +; LED out (red) |6 C4 C1 9| CIC data i/o 1 (24) [2] / {D4 in} +; LED_TYPE in |7 C3 C2 8| CIC slave reset out (25) [11] +; `-----------' +; +; pin 8 connected to key CIC pin 7 (or clone CIC pin 5) +; pin 9 connected to key CIC pin 1 (or clone CIC pin 6) +; pin 10 connected to key CIC pin 2 (or clone CIC pin 7) +; pin 11 connected to key CIC pin 9 (SNES /reset line) +; pin 12 connected to PPU1 pin 24 & PPU2 pin 30 (both isolated from mainboard) +; pin 13 connected to reset button +; +; LED_TYPE sets the output mode for the LED pins (must be tied to either level): +; low = common cathode +; high = common anode (output inverted) +; +; D4 out is always switched to the autodetected region and is not user +; overridable except in SuperCIC pair mode or when no key CIC is detected. +; It can be used, by adding an address decoder and a latch, to override +; bit 4 of the $213f register (used by games to detect the console region). +; +; REG_TIMEOUT in (Pin 4) enables a ~9 sec timeout before switching +; to the forced region. If D4 is not used, the REG_TIMEOUT pin should be +; connected to Vcc. +; +; Host reset out behaves as follows: +; After powerup it is held low for a couple of ms to allow the components +; to power-up properly. +; It is then asserted a high level even if the CIC "auth" should fail at +; any point, thus enabling homebrew or other cartridges without a CIC or +; CIC clone to be run properly while maintaining compatibility with +; cartridges requiring a CIC, like S-DD1 or SA-1 games. +; The type of key CIC (411/413) is detected automatically. +; +; This implementation supports automatic 50/60Hz switching based on the +; detected key CIC in the game cartridge. Also the 50/60Hz setting can be +; overridden by the user via the reset button. +; +; Reset / Mode switch behaves as follows: +; Reset is pressed for < 586ms -> reset console upon release +; Reset is pressed for >= 586ms -> enter mode switch cycle, no reset +; Modes are cycled every 586ms as shown in Fig.1 as long as the reset button +; is held down. +; The currently selected mode is indicated by the color of the power LED +; (see Table 3). +; The mode is finally selected by releasing the reset button while the +; desired LED color is shown. The selected mode will then become effective +; and will be saved to EEPROM. Mode switching does not reset the console. +; +; Note that in case a valid CIC is detected in the game cartridge, video mode +; will be forced to its corresponding region for the first ~9 seconds after +; reset or powerup if the REG_TIMEOUT enable pin is high. +; This is an attempt to trick the region detection on most games. See Table 1. +; In case no CIC is present in the game cartridge, or REG_TIMEOUT is low, the +; user setting is applied immediately. +; +; SuperCIC pair mode: when a SuperCIC lock and SuperCIC key detect each other +; they both switch both of the data pins to inputs. The lock then passes +; through data i/o 0 to SNES 50/60Hz and data i/o 1 to an optional D4 output +; (for overriding the 213f register using additional hardware). This makes it +; possible to switch 50/60Hz and D4 from the cartridge slot, e.g. by +; connecting an additional MCU to the CIC data lines. Of course, they have to +; be tristated for normal (non-passthrough) operation. +; +; Table 1. 50/60Hz output behavior according to user setting and key CIC type. +; SuperCIC key CIC "region" +; ------------------------------------------------------ +; 60Hz D/F413 50Hz for ~9 sec, then 60Hz +; 60Hz D/F411 60Hz permanent +; 60Hz none 60Hz permanent +; +; 50Hz D/F413 50Hz permanent +; 50Hz D/F411 60Hz for ~9 sec, then 50Hz +; 50Hz none 50Hz permanent +; +; Auto D/F413 50Hz permanent +; Auto D/F411 60Hz permanent +; Auto none 60Hz permanent +; +; Table 2. D4 output behavior according to key CIC type +; key CIC output +; ----------------------------------------------- +; D/F413 1 (PAL) +; D/F411 0 (NTSC) +; none same as user setting (NTSC if Auto) +; +; Fig.1. SuperCIC mode cycle. +; ,->60Hz--->50Hz--->Auto->. +; `-------<--------<-------' +; +; Table 3. LED color according to user setting. +; mode LED color +; --------------------- +; 60Hz red +; 50Hz green +; Auto orange +; +; Table 4. memory usage. +; -------------------basic CIC functions-------------------- +; 0x20 buffer for seed calc and transfer +; 0x21 - 0x2f seed area (lock seed) +; 0x30 buffer for seed calc +; 0x31 - 0x3f seed area (key seed; 0x31 filled in by lock) +; 0x40 - 0x41 buffer for seed calc +; 0x42 input buffer +; 0x43 variable for key detect +; 0x44 "direction" buffer +; 0x4d buffer for eeprom access +; 0x4e loop variable for longwait +; 0x4f loop variable for wait +; -------------------SuperCIC extensions-------------------- +; 0x50 power LED state (no bits except 4 and 5 must be set!!) +; 0x51 last reset button state +; 0x52 mode dirty flag +; 0x53 tmr overflow counter +; 0x54 region output (0: 60Hz, 2: 50Hz) +; 0x55 final mode setting +; 0x56 temp LED state +; 0x57 detected region (0: 60Hz, 2: 50Hz) +; 0x58 forced region (0: 60Hz, 2: 50Hz) +; 0x59 detected D4 (0: 60Hz, 16: 50Hz) +; 0x5e SuperCIC pair mode detect (phase 1) +; 0x5f SuperCIC pair mode detect (phase 2) +; +; --------------------------------------------------------------------- + + +; ----------------------------------------------------------------------- + __CONFIG _EC_OSC & _WDT_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _CPD_OFF + +; ----------------------------------------------------------------------- +; code memory + org 0x0000 + nop + nop + nop + goto init +trap + movlw 0x3 + xorwf PORTC, f + goto trap +rst ; we jump here after powerup or RC0=1 + bcf PORTC, 0 ; clear stream i/o + bcf PORTC, 1 ; clear stream i/o + bcf PORTC, 2 ; disable slave reset + bcf PORTA, 2 ; hold the SNES in reset + movlw 0x30 ; prescaler 1:8 + movwf T1CON ; + clrf PIR1 +rst_loop + btfsc PORTA, 0 ; stay in "reset" as long as RA0=1 + goto rst_loop + clrf 0x44 ; clear dir buffer + clrf 0x51 ; clear reset button state + clrf 0x52 ; clear modechange flag + clrf 0x53 + clrf 0x54 ; clear user mode + clrf 0x57 ; clear key mode + clrf 0x59 ; clear D4 + clrf 0x5e ; + clrf 0x5f ; + bsf STATUS, RP0 ; fetch current mode from EEPROM + nop ; (RP 1 reserved and maintained as 0) + clrf EEADR ; address 0 + bsf EECON1, RD ; + movf EEDAT, w ; + bcf STATUS, RP0 + nop + movwf 0x55 ; store saved mode in mode var + movwf 0x56 ; and temp LED + movwf 0x58 ; and forced region + andlw 0x03 ; mask + btfsc PORTC, 3 ; invert LEDs? + xorlw 0x03 ; then make it so + movwf 0x50 ; and store + swapf 0x50, f ; and nibbleswap for actual output + + btfss PORTA, 3 ; if D4 mode is disabled: + bsf 0x53, 4 ; simulate region timeout->immediate region chg + + movlw 0x2 + andwf 0x58, f + + clrf PIR1 ; reset overflow bit + clrf TMR1L ; reset counter + clrf TMR1H + bsf T1CON, 0 ; start the timer + goto main ; go go go +init +; PORTA: in out in out out in +; PORTC: out out in out out in + bcf STATUS, RP0 + nop + clrf PORTA + movlw 0x07 ; GPIO2..0 are digital I/O (not connected to comparator) + movwf CMCON + movlw 0x00 ; disable all interrupts + movwf INTCON + bsf STATUS, RP0 + if use_16f676 + clrf ANSEL + else + nop + endif + movlw 0x29 ; in out in out out in + movwf TRISA + movlw 0x09 ; out out in out out in + movwf TRISC + movlw 0x00 ; no pullups + movwf WPUA + movlw 0x80 ; global pullup disable + movwf OPTION_REG + + bcf STATUS, RP0 + nop + bcf PORTA, 2 ; hold SNES in reset + goto rst +main + movlw 0x40 ; wait a bit before initializing the slave + console + call longwait + + nop + + bsf PORTC, 2 ; trigger the slave + nop + nop + bcf PORTC, 2 + + bsf STATUS, RP0 + nop + bcf TRISC, 0 + bsf TRISC, 1 + bcf STATUS, RP0 + nop +; --------INIT LOCK SEED (what we must send)-------- + movlw 0xb + movwf 0x21 + movlw 0x1 + movwf 0x22 + movlw 0x4 + movwf 0x23 + movlw 0xf + movwf 0x24 + movlw 0x4 + movwf 0x25 + movlw 0xb + movwf 0x26 + movlw 0x5 + movwf 0x27 + movlw 0x7 + movwf 0x28 + movlw 0xf + movwf 0x29 + movlw 0xd + movwf 0x2a + movlw 0x6 + movwf 0x2b + movlw 0x1 + movwf 0x2c + movlw 0xe + movwf 0x2d + movlw 0x9 + movwf 0x2e + movlw 0x8 + movwf 0x2f + +; --------INIT KEY SEED (what the key sends)-------- + movlw 0xf ; we always request the same stream for simplicity + movwf 0x31 + movlw 0x0 ; this is filled in by key autodetect + movwf 0x32 + movlw 0xa + movwf 0x33 + movlw 0x1 + movwf 0x34 + movlw 0x8 + movwf 0x35 + movlw 0x5 + movwf 0x36 + movlw 0xf + movwf 0x37 + movlw 0x1 + movwf 0x38 + movwf 0x39 + movlw 0xe + movwf 0x3a + movlw 0x1 + movwf 0x3b + movlw 0x0 + movwf 0x3c + movlw 0xd + movwf 0x3d + movlw 0xe + movwf 0x3e + movlw 0xc + movwf 0x3f + +; --------wait before sending stream ID-------- + movlw 0xba + call wait + +; --------lock sends stream ID. 15 cycles per bit-------- + btfsc 0x31, 3 ; read stream select bit + bsf PORTC, 0 ; send bit + nop + nop + bcf PORTC, 0 + movlw 0x1 ; wait=3*0+7 + call wait ; burn 10 cycles in total + nop + nop + + btfsc 0x31, 0 ; read stream select bit + bsf PORTC, 0 ; send bit + nop + nop + bcf PORTC, 0 + movlw 0x1 ; wait=3*0+7 + call wait ; burn 10 cycles in total + nop + nop + + btfsc 0x31, 1 ; read stream select bit + bsf PORTC, 0 ; send bit + nop + nop + bcf PORTC, 0 + movlw 0x1 ; wait=3*0+7 + call wait ; burn 10 cycles in total + nop + nop + + btfsc 0x31, 2 ; read stream select bit + bsf PORTC, 0 ; send bit + nop + nop + bcf PORTC, 0 + movlw 0x1 ; wait=3*0+7 + call wait ; burn 10 cycles in total + bsf STATUS, RP0 + nop + bsf TRISC, 0 + bcf TRISC, 1 + bcf STATUS, RP0 + nop + movlw 0x22 ; + call wait ; wait 106 + nop + nop + movlw 0x1 ; 'first time' bit + movwf 0x43 ; for key detection +; --------main loop-------- +loop + movlw 0x1 +loop0 + addlw 0x20 ; lock stream + movwf FSR ; store in index reg +loop1 + nop + movf INDF, w ; load seed value + andlw 0x01 ; mask LSB + movwf 0x20 + btfsc 0x20, 0 ; copy from bit 0 + bsf 0x20, 1 ; (if set) + movf 0x50, w ; get LED state + iorwf 0x20, f ; combine with data i/o + movf 0x20, w + movwf PORTC + nop + nop + movf PORTC, w ; read input + movwf 0x42 ; store input + movf 0x50, w ; get LED state + movwf PORTC ; reset GPIO + + call checkkey + + btfsc 0x44, 0 ; check "direction" + rrf 0x42, f ; shift received bit into place + bsf FSR, 4 ; goto other stream + movf INDF, w ; read + xorwf 0x42, f ; xor received + calculated + bcf FSR, 4 ; back to our own stream + btfsc 0x42, 0 ; equal? then continue + bsf 0x43, 1 ; else mark key invalid + + btfss 0x43, 1 ; if key invalid: + goto main_skipinval1 ; + bcf 0x57, 1 ; set det.region=60Hz + bsf 0x53, 4 ; simulate region timeout->immediate region chg + clrf 0x59 ; clear D4 output + btfsc 0x54, 1 ; use effective region for D4 output + bsf 0x59, 4 + +main_skipinval2 + call checkrst + + incf FSR, f ; next one + movlw 0xf + andwf FSR, w + btfss STATUS, Z + goto loop1 + call mangle + call mangle + call mangle + movf 0x37, w + movwf 0x44 + nop + nop + nop + nop + btfsc 0x37, 0 + goto swap + bsf STATUS, RP0 + nop + bsf TRISC, 0 + bcf TRISC, 1 + goto swapskip +swap + bsf STATUS, RP0 + nop + bcf TRISC, 0 + bsf TRISC, 1 + nop +swapskip + bcf STATUS, RP0 + nop + bsf 0x54, 2 ; run the console + movf 0x54, w ; read resolved mode + iorwf 0x59, w ; get D4 value + movwf PORTA + bcf 0x43, 0 ; don't check key region anymore + movf 0x37, w + andlw 0xf + btfss STATUS, Z + goto loop0 + goto loop + + +main_skipinval1 + nop + nop + goto main_skipinval2 + + +; --------calculate new seeds-------- +; had to be unrolled because PIC has an inefficient way of handling +; indirect access, no post increment, no swap, etc. +mangle + call mangle_lock + nop + nop +mangle_key + movf 0x2f, w + movwf 0x20 +mangle_key_loop + addlw 0x1 + addwf 0x21, f + movf 0x22, w + movwf 0x40 + movf 0x21, w + addwf 0x22, f + incf 0x22, f + comf 0x22, f + movf 0x23, w + movwf 0x41 ; store 23 to 41 + movlw 0xf + andwf 0x23, f + movf 0x40, w ; add 40(22 old)+23+#1 and skip if carry + andlw 0xf + addwf 0x23, f + incf 0x23, f + btfsc 0x23, 4 + goto mangle_key_withskip +mangle_key_withoutskip + movf 0x41, w ; restore 23 + addwf 0x24, f ; add to 24 + movf 0x25, w + movwf 0x40 ; save 25 to 40 + movf 0x24, w + addwf 0x25, f + movf 0x26, w + movwf 0x41 ; save 26 to 41 + movf 0x40, w ; restore 25 + andlw 0xf ; mask nibble + addlw 0x8 ; add #8 to HIGH nibble + movwf 0x40 + btfss 0x40, 4 ; skip if carry to 5th bit + addwf 0x26, w + movwf 0x26 + + movf 0x41, w ; restore 26 + addlw 0x1 ; inc + addwf 0x27, f ; add to 27 + + movf 0x27, w ; + addlw 0x1 ; inc + addwf 0x28, f ; add to 28 + + movf 0x28, w ; + addlw 0x1 ; inc + addwf 0x29, f ; add to 29 + + movf 0x29, w ; + addlw 0x1 ; inc + addwf 0x2a, f ; add to 2a + + movf 0x2a, w ; + addlw 0x1 ; inc + addwf 0x2b, f ; add to 2b + + movf 0x2b, w ; + addlw 0x1 ; inc + addwf 0x2c, f ; add to 2c + + movf 0x2c, w ; + addlw 0x1 ; inc + addwf 0x2d, f ; add to 2d + + movf 0x2d, w ; + addlw 0x1 ; inc + addwf 0x2e, f ; add to 2e + + movf 0x2e, w ; + addlw 0x1 ; inc + addwf 0x2f, f ; add to 2f + + movf 0x20, w ; restore original 0xf + andlw 0xf + addlw 0xf + movwf 0x20 + nop + nop + nop + nop + nop + nop + nop + nop + nop + btfss 0x20, 4 ; skip if half-byte carry + goto mangle_return ; +2 cycles in return + nop + goto mangle_key_loop +; 69 when goto, 69 when return +; CIC has 78 -> 9 nops + +mangle_key_withskip + movf 0x41, w ; restore 23 + addwf 0x23, f ; add to 23 + movf 0x24, w + movwf 0x40 ; save 24 to 40 + movf 0x23, w + addwf 0x24, f + movf 0x25, w + movwf 0x41 ; save 25 to 41 + movf 0x40, w ; restore 24 + andlw 0xf ; mask nibble + addlw 0x8 ; add #8 to HIGH nibble + movwf 0x40 + btfss 0x40, 4 ; skip if carry to 5th bit + addwf 0x25, w + movwf 0x25 + + movf 0x41, w ; restore 25 + addlw 0x1 ; inc + addwf 0x26, f ; add to 26 + + movf 0x26, w ; + addlw 0x1 ; inc + addwf 0x27, f ; add to 27 + + movf 0x27, w ; + addlw 0x1 ; inc + addwf 0x28, f ; add to 28 + + movf 0x28, w ; + addlw 0x1 ; inc + addwf 0x29, f ; add to 29 + + movf 0x29, w ; + addlw 0x1 ; inc + addwf 0x2a, f ; add to 2a + + movf 0x2a, w ; + addlw 0x1 ; inc + addwf 0x2b, f ; add to 2b + + movf 0x2b, w ; + addlw 0x1 ; inc + addwf 0x2c, f ; add to 2c + + movf 0x2c, w ; + addlw 0x1 ; inc + addwf 0x2d, f ; add to 2d + + movf 0x2d, w ; + addlw 0x1 ; inc + addwf 0x2e, f ; add to 2e + + movf 0x2e, w ; + addlw 0x1 ; inc + addwf 0x2f, f ; add to 2f + + movf 0x20, w ; restore original 0xf + andlw 0xf + addlw 0xf + movwf 0x20 + bsf PORTC, 1 + movf PORTC, w + movwf 0x5e + nop + bcf PORTC, 1 + nop ; add nop here, 2010 SCIC key is a bit late. + movf PORTC, w + movwf 0x5f + nop + nop + nop + btfss 0x20, 4 ; skip if half-byte carry + goto mangle_return ; +2 cycles in return + movf 0x20, w ; restore w (previously destroyed) + goto mangle_key_loop +mangle_return + return +; 73 when goto, 73 when return +; CIC has 84 -> 11 nops + +mangle_lock + movf 0x3f, w + movwf 0x30 +mangle_lock_loop + addlw 0x1 + addwf 0x31, f + movf 0x32, w + movwf 0x40 + movf 0x31, w + addwf 0x32, f + incf 0x32, f + comf 0x32, f + movf 0x33, w + movwf 0x41 ; store 33 to 41 + movlw 0xf + andwf 0x33, f + movf 0x40, w ; add 40(32 old)+33+#1 and skip if carry + andlw 0xf + addwf 0x33, f + incf 0x33, f + btfsc 0x33, 4 + goto mangle_lock_withskip +mangle_lock_withoutskip + movf 0x41, w ; restore 33 + addwf 0x34, f ; add to 34 + movf 0x35, w + movwf 0x40 ; save 35 to 40 + movf 0x34, w + addwf 0x35, f + movf 0x36, w + movwf 0x41 ; save 36 to 41 + movf 0x40, w ; restore 35 + andlw 0xf ; mask nibble + addlw 0x8 ; add #8 to HIGH nibble + movwf 0x40 + btfss 0x40, 4 ; skip if carry to 5th bit + addwf 0x36, w + movwf 0x36 + + movf 0x41, w ; restore 36 + addlw 0x1 ; inc + addwf 0x37, f ; add to 37 + + movf 0x37, w ; + addlw 0x1 ; inc + addwf 0x38, f ; add to 38 + + movf 0x38, w ; + addlw 0x1 ; inc + addwf 0x39, f ; add to 39 + + movf 0x39, w ; + addlw 0x1 ; inc + addwf 0x3a, f ; add to 3a + + movf 0x3a, w ; + addlw 0x1 ; inc + addwf 0x3b, f ; add to 3b + + movf 0x3b, w ; + addlw 0x1 ; inc + addwf 0x3c, f ; add to 3c + + movf 0x3c, w ; + addlw 0x1 ; inc + addwf 0x3d, f ; add to 3d + + movf 0x3d, w ; + addlw 0x1 ; inc + addwf 0x3e, f ; add to 3e + + movf 0x3e, w ; + addlw 0x1 ; inc + addwf 0x3f, f ; add to 3f + + movf 0x30, w ; restore original 0xf + andlw 0xf + addlw 0xf + movwf 0x30 + nop + nop + nop + nop + nop + nop + nop + nop + nop + btfss 0x30, 4 ; skip if half-byte carry + goto mangle_return + nop + goto mangle_lock_loop +; 69 when goto, 69 when return +; CIC has 78 -> 9 nops + +mangle_lock_withskip + movf 0x41, w ; restore 33 + addwf 0x33, f ; add to 33 + movf 0x34, w + movwf 0x40 ; save 34 to 40 + movf 0x33, w + addwf 0x34, f + movf 0x35, w + movwf 0x41 ; save 35 to 41 + movf 0x40, w ; restore 34 + andlw 0xf ; mask nibble + addlw 0x8 ; add #8 to HIGH nibble + movwf 0x40 + btfss 0x40, 4 ; skip if carry to 5th bit + addwf 0x35, w + movwf 0x35 + + movf 0x41, w ; restore 35 + addlw 0x1 ; inc + addwf 0x36, f ; add to 36 + + movf 0x36, w ; + addlw 0x1 ; inc + addwf 0x37, f ; add to 37 + + movf 0x37, w ; + addlw 0x1 ; inc + addwf 0x38, f ; add to 38 + + movf 0x38, w ; + addlw 0x1 ; inc + addwf 0x39, f ; add to 39 + + movf 0x39, w ; + addlw 0x1 ; inc + addwf 0x3a, f ; add to 3a + + movf 0x3a, w ; + addlw 0x1 ; inc + addwf 0x3b, f ; add to 3b + + movf 0x3b, w ; + addlw 0x1 ; inc + addwf 0x3c, f ; add to 3c + + movf 0x3c, w ; + addlw 0x1 ; inc + addwf 0x3d, f ; add to 3d + + movf 0x3d, w ; + addlw 0x1 ; inc + addwf 0x3e, f ; add to 3e + + movf 0x3e, w ; + addlw 0x1 ; inc + addwf 0x3f, f ; add to 3f + + movf 0x30, w ; restore original 0xf + andlw 0xf + addlw 0xf + movwf 0x30 + + btfsc 0x5e, 0 + goto scic_pair_skip1 + btfss 0x5f, 0 + goto scic_pair_skip2 + goto supercic_pairmode +scic_pair_skip1 + nop + nop +scic_pair_skip2 + nop + nop + nop + nop + nop + nop + + btfss 0x30, 4 ; skip if half-byte carry + goto mangle_return + nop + goto mangle_lock_loop +; 73 when goto, 73 when return +; CIC has 84 -> 11 nops + +; --------wait: 3*(W-1)+7 cycles (including call+return). W=0 -> 256!-------- +wait + movwf 0x4f +wait0 decfsz 0x4f, f + goto wait0 + return + +; --------wait long: 8+(3*(w-1))+(772*w). W=0 -> 256!-------- +longwait + movwf 0x4e + clrw +longwait0 + call wait + decfsz 0x4e, f + goto longwait0 + return + +; --------die (do nothing, wait for reset)-------- +die + btfsc PORTA, 0 + goto rst + goto die + +; --------check the key input and change "region" when appropriate-------- +; --------requires 20 cycles (incl. call+return) +checkkey + btfss 0x43, 0 ; first time? + goto checkkey_nocheck; if not, just burn some cycles + movlw 0x22 ; are we at the correct stream offset? + xorwf FSR, w + btfss STATUS, Z ; if not equal: + goto checkkey_nocheck2; burn some cycles less. + ; if equal do the check + btfss 0x42, 0 ; if value from slave is set it's a 411 + goto checkkey_413 +checkkey_411 + nop ; to compensate for untaken branch + bcf 0x57, 1 ; set detected mode (60Hz) + bcf 0x59, 4 ; set detected D4 mode (60Hz) + bcf 0x54, 1 ; set output mode (60Hz) + movlw 0x9 + goto checkkey_save +checkkey_413 + bsf 0x57, 1 ; set detected mode (50Hz) + bsf 0x59, 4 ; set detected D4 mode (50Hz) + bsf 0x54, 1 ; set output mode (50Hz) + movlw 0x6 + goto checkkey_save + +checkkey_nocheck + nop + nop + nop + nop +checkkey_nocheck2 + nop + nop + nop + nop + nop + nop + nop + goto checkkey_done +checkkey_save + movwf 0x32 +checkkey_done + return + +; -------- check reset button, update status LEDs, etc. +checkrst ; 4 + movf PORTA, w + btfss 0x51, 0 + goto checkrst_0 + nop +checkrst_1 ; 4 + movwf 0x51 + btfsc 0x51, 0 + goto checkrst_1_1 + nop +checkrst_1_0 ; 26 + ; if modechange flag is set: clear modechange flag, set mode, save, restart timer + ; else reset + btfss 0x52, 0 + goto rst2 ; modechange flag is not set, reset. timing is irrelevant + clrf 0x52 ; clear modechange flag + movf 0x56, w ; get temp mode + movwf 0x55 ; set final mode + movwf 0x58 ; set forced mode + bsf STATUS, RP0 ; save to EEPROM + nop + movwf EEDAT + bsf EECON1,WREN + movlw 0x55 + movwf EECON2 + movlw 0xaa + movwf EECON2 + bsf EECON1, WR + bcf STATUS, RP0 ; two cycles again + nop + movlw 0x2 + andwf 0x58, f ; cleanup forced mode + bcf T1CON, 0 ; stop the timer + clrf PIR1 ; reset overflow bit + clrf TMR1L ; reset counter + clrf TMR1H + bsf T1CON, 0 ; restart the timer + return ; shortcut (no goto checkrst_end) +checkrst_1_1 ; 24 + ; check TMR overflow + ; if overflow, change LED, reset TMR+overflow, set modechange flag + ; else do nothing + nop + nop + nop + nop + btfss PIR1, 0 + goto checkrst_end_plus17 + bcf T1CON, 0 ; stop the timer + clrf PIR1 ; reset overflow bit + clrf TMR1L ; reset counter + clrf TMR1H + bsf T1CON, 0 ; restart the timer + incf 0x56, f ; change tmp LED/mode + movlw 0x5 + btfsc 0x56, 2 ; if 4: + xorwf 0x56, f ; change back to 1 + movf 0x56, w + andlw 0x03 ; mask + btfsc PORTC, 3 ; invert LEDs? + xorlw 0x03 ; then make it so + movwf 0x50 + swapf 0x50, f ; adjust for GPIO pins + bsf 0x52, 0 ; set modechange flag + goto checkrst_end + +checkrst_0 ; 4 + movwf 0x51 + btfsc 0x51, 0 + goto checkrst_0_1 + nop +checkrst_0_0 ; 24 + nop + nop + nop + nop + nop + nop + ; count some overflows, change region from detected to forced unless auto + btfsc 0x53, 4 ; past delay? + goto checkrst_0_0_setregion_plus5 + btfss PIR1, 0 + goto checkrst_end_plus13 + clrf PIR1 + incf 0x53, f ; increment overflow counter + btfss 0x53, 4 ; 0x10 reached? + goto checkrst_end_plus9 +checkrst_0_0_setregion + movlw 0x3 + xorwf 0x55, w ; mode=auto? + btfss STATUS, Z + goto checkrst_0_0_setregion_forced +checkrst_0_0_setregion_auto + movf 0x57, w ; get detected region + goto checkrst_0_0_setregion_save +checkrst_0_0_setregion_forced + movf 0x58, w ; get forced region + nop +checkrst_0_0_setregion_save + movwf 0x54 ; set to output + goto checkrst_end + +checkrst_0_1 ; 24 + ; reset + start TMR, reset TMR overflow + clrf TMR1L ; reset timer register + clrf TMR1H + clrf PIR1 ; clear overflow bit + bsf T1CON, 0 + goto checkrst_end_plus18 + +checkrst_end ; 2 + return + +checkrst_end_plus18 + nop +checkrst_end_plus17 + nop + nop + nop + nop +checkrst_end_plus13 + nop + nop + nop + nop +checkrst_end_plus9 + nop + nop + nop + nop + nop + nop + nop + goto checkrst_end + +checkrst_0_0_setregion_plus5 + nop + nop + nop + goto checkrst_0_0_setregion + +supercic_pairmode + bsf STATUS, RP0 + nop + bsf TRISC, 0 ; tristate both + bsf TRISC, 1 ; data lines + bcf STATUS, RP0 + nop +supercic_pairmode_loop + clrf 0x5d + bsf 0x5d, 2 + btfsc PORTC, 0 + bsf 0x5d, 1 + btfsc PORTC, 1 + bsf 0x5d, 4 + btfsc PORTA, 0 + bcf 0x5d, 2 + movf 0x5d, w + movwf PORTA + btfss PORTC, 0 + goto supercic_pairmode_led_60 +supercic_pairmode_led_50 + movlw 0x20 + btfsc PORTC, 3 + xorlw 0x30 + movwf PORTC + goto supercic_pairmode_loop +supercic_pairmode_led_60 + movlw 0x10 + btfsc PORTC, 3 + xorlw 0x30 + movwf PORTC + goto supercic_pairmode_loop + +rst2 + bcf PORTA, 2 ; hold the SNES in reset + bcf T1CON, 0 ; stop the timer + clrf TMR1L ; reset timer register + clrf TMR1H + clrf PIR1 ; clear overflow bit + bsf T1CON, 0 + clrf 0x51 ; clear reset button state +rst2_loop1 + btfsc PORTA, 0 ; if reset button is pressed + bsf 0x51, 0 ; set reset flag + btfss PIR1, 0 ; break if timeout + goto rst2_loop1 + + btfss 0x51, 0 ; if no 2nd reset button press occured: + goto rst ; just reset normally + + clrf 0x53 ; else keep resetting some more + bcf T1CON, 0 ; stop the timer + clrf TMR1L ; reset timer register + clrf TMR1H + clrf PIR1 ; clear overflow bit + bsf T1CON, 0 +rst2_loop2 + btfss PIR1, 0 + goto rst2_loop2 + clrf PIR1 + incf 0x53, f + movlw 0x0a + xorwf 0x53, w + btfss STATUS, Z ; 10 overflows ~= 5.86s + goto rst2_loop2 + goto rst ; finally reset +; ----------------------------------------------------------------------- +; eeprom data + org __EEPROM_START + de 0x01 ;current mode (default: 60Hz) + end +; ------------------------------------------------------------------------ diff --git a/supercic/supercic-lock.hex b/supercic/supercic-lock.hex new file mode 100644 index 0000000..d3d193b --- /dev/null +++ b/supercic/supercic-lock.hex @@ -0,0 +1,101 @@ +:020000040000FA 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